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ETISS 0.8.0
ExtendableTranslatingInstructionSetSimulator(version0.8.0)
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Go to the documentation of this file.
38 #define RISCV64_DEBUG_CALL 0
39 #define RISCV64_Pipeline1 0
40 #define RISCV64_Pipeline2 0
41 using namespace etiss ;
52 headers_.insert(
"Arch/RISCV64/RISCV64.h");
78 #if RISCV64_Pipeline1 || RISCV64_Pipeline2
89 for(
int i = 0; i < 9; i = i + 1){
96 for(
int i = 0; i < 32; i ++)
98 riscv64cpu->
ins_X[i] = 0;
99 riscv64cpu->
X[i] = & riscv64cpu->
ins_X[i];
103 riscv64cpu->
ZERO = 0;
104 riscv64cpu->
X[0] = & (riscv64cpu->
ZERO);
106 riscv64cpu->
X[1] = & (riscv64cpu->
RA);
108 riscv64cpu->
X[2] = & (riscv64cpu->
SP);
110 riscv64cpu->
X[3] = & (riscv64cpu->
GP);
112 riscv64cpu->
X[4] = & (riscv64cpu->
TP);
114 riscv64cpu->
X[5] = & (riscv64cpu->
T0);
116 riscv64cpu->
X[6] = & (riscv64cpu->
T1);
118 riscv64cpu->
X[7] = & (riscv64cpu->
T2);
120 riscv64cpu->
X[8] = & (riscv64cpu->
S0);
122 riscv64cpu->
X[9] = & (riscv64cpu->
S1);
124 riscv64cpu->
X[10] = & (riscv64cpu->
A0);
126 riscv64cpu->
X[11] = & (riscv64cpu->
A1);
128 riscv64cpu->
X[12] = & (riscv64cpu->
A2);
130 riscv64cpu->
X[13] = & (riscv64cpu->
A3);
132 riscv64cpu->
X[14] = & (riscv64cpu->
A4);
134 riscv64cpu->
X[15] = & (riscv64cpu->
A5);
136 riscv64cpu->
X[16] = & (riscv64cpu->
A6);
138 riscv64cpu->
X[17] = & (riscv64cpu->
A7);
140 riscv64cpu->
X[18] = & (riscv64cpu->
S2);
142 riscv64cpu->
X[19] = & (riscv64cpu->
S3);
144 riscv64cpu->
X[20] = & (riscv64cpu->
S4);
146 riscv64cpu->
X[21] = & (riscv64cpu->
S5);
148 riscv64cpu->
X[22] = & (riscv64cpu->
S6);
150 riscv64cpu->
X[23] = & (riscv64cpu->
S7);
152 riscv64cpu->
X[24] = & (riscv64cpu->
S8);
154 riscv64cpu->
X[25] = & (riscv64cpu->
S9);
156 riscv64cpu->
X[26] = & (riscv64cpu->
S10);
158 riscv64cpu->
X[27] = & (riscv64cpu->
S11);
160 riscv64cpu->
X[28] = & (riscv64cpu->
T3);
162 riscv64cpu->
X[29] = & (riscv64cpu->
T4);
164 riscv64cpu->
X[30] = & (riscv64cpu->
T5);
166 riscv64cpu->
X[31] = & (riscv64cpu->
T6);
167 for (
int i = 0; i<32 ;i++){
168 riscv64cpu->
F[i] = 0;
170 riscv64cpu->
FCSR = 0;
171 for (
int i = 0; i<4096 ;i++){
172 riscv64cpu->
CSR[i] = 0;
174 riscv64cpu->
CSR[0] = 15;
175 riscv64cpu->
CSR[256] = 15;
176 riscv64cpu->
CSR[768] = 15;
177 riscv64cpu->
CSR[260] = 4294967295;
178 riscv64cpu->
CSR[769] = 0x800000000014112D;
179 riscv64cpu->
CSR[3088] = 3;
180 for (
int i = 0; i<4 ;i++){
181 riscv64cpu->
FENCE[i] = 0;
186 riscv64cpu->
CSR[0x304] = (0xFFFFFFFFFFFFFBBB);
188 riscv64cpu->
CSR[0x104] = riscv64cpu->
CSR[0x304] & (~(0x888));
190 riscv64cpu->
CSR[0x004] = riscv64cpu->
CSR[0x304] & (~(0xAAA));
225 cb.
fileglobalCode().insert(
"#include \"Arch/RISCV64/RISCV64.h\"\n");
307 partInit.
code() = std::string(
"//lui\n")+
308 "etiss_uint32 temp = 0;\n"
309 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
310 #if RISCV64_Pipeline1
311 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
312 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
313 "etiss_uint32 num_stages = 4;\n"
314 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
315 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
317 #if RISCV64_Pipeline2
318 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
319 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
320 "etiss_uint32 num_stages = 4;\n"
321 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
322 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
325 "etiss_int64 imm_extended = 0;\n"
327 "if((" +
toString(imm) +
" & 0x80000000)>>31 == 0)\n"
329 "imm_extended = 0;\n"
330 #if RISCV64_DEBUG_CALL
331 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
337 "imm_extended = 4294967295;\n"
338 #if RISCV64_DEBUG_CALL
339 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
341 "imm_extended = (imm_extended << 32);\n"
342 #if RISCV64_DEBUG_CALL
343 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
346 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
347 #if RISCV64_DEBUG_CALL
348 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
352 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = imm_extended;\n"
353 #if RISCV64_DEBUG_CALL
354 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
386 partInit.
code() = std::string(
"//auipc\n")+
387 "etiss_uint32 temp = 0;\n"
388 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
389 #if RISCV64_Pipeline1
390 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
391 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
392 "etiss_uint32 num_stages = 4;\n"
393 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
394 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
396 #if RISCV64_Pipeline2
397 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
398 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
399 "etiss_uint32 num_stages = 4;\n"
400 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
401 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
404 "etiss_int64 imm_extended = 0;\n"
406 "if((" +
toString(imm) +
" & 0x80000000)>>31 == 0)\n"
408 "imm_extended = 0;\n"
409 #if RISCV64_DEBUG_CALL
410 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
416 "imm_extended = 4294967295;\n"
417 #if RISCV64_DEBUG_CALL
418 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
420 "imm_extended = (imm_extended << 32);\n"
421 #if RISCV64_DEBUG_CALL
422 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
425 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
426 #if RISCV64_DEBUG_CALL
427 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
432 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
434 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
436 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0 + imm_extended;\n"
437 #if RISCV64_DEBUG_CALL
438 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
479 partInit.
code() = std::string(
"//jal\n")+
480 "etiss_uint32 temp = 0;\n"
481 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
482 #if RISCV64_Pipeline1
483 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
484 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
485 "etiss_uint32 num_stages = 4;\n"
486 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
487 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
489 #if RISCV64_Pipeline2
490 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
491 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
492 "etiss_uint32 num_stages = 4;\n"
493 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
494 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
497 "etiss_int64 imm_extended = 0;\n"
499 "if((" +
toString(imm) +
" & 0x100000)>>20 == 0)\n"
501 "imm_extended = 0;\n"
502 #if RISCV64_DEBUG_CALL
503 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
509 "imm_extended = 4294967295;\n"
510 #if RISCV64_DEBUG_CALL
511 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
513 "imm_extended = (imm_extended << 32);\n"
514 #if RISCV64_DEBUG_CALL
515 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
517 "imm_extended = imm_extended + 4292870144;\n"
518 #if RISCV64_DEBUG_CALL
519 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
522 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
523 #if RISCV64_DEBUG_CALL
524 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
529 #if RISCV64_DEBUG_CALL
530 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
540 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
542 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
544 "cpu->instructionPointer = (etiss_int64)cast_0 + imm_extended;\n"
545 #if RISCV64_DEBUG_CALL
546 "printf(\"cpu->instructionPointer = %#lx\\n\",cpu->instructionPointer); \n"
549 "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n"
582 partInit.
code() = std::string(
"//jalr\n")+
583 "etiss_uint32 temp = 0;\n"
584 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
585 #if RISCV64_Pipeline1
586 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
587 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
588 "etiss_uint32 num_stages = 4;\n"
589 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
590 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
592 #if RISCV64_Pipeline2
593 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
594 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
595 "etiss_uint32 num_stages = 4;\n"
596 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
597 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
600 "etiss_int64 imm_extended = 0;\n"
601 "etiss_int64 new_pc = 0;\n"
603 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
605 "imm_extended = 0;\n"
606 #if RISCV64_DEBUG_CALL
607 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
613 "imm_extended = 4294967295;\n"
614 #if RISCV64_DEBUG_CALL
615 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
617 "imm_extended = (imm_extended << 32);\n"
618 #if RISCV64_DEBUG_CALL
619 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
621 "imm_extended = imm_extended + 4294963200;\n"
622 #if RISCV64_DEBUG_CALL
623 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
626 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
627 #if RISCV64_DEBUG_CALL
628 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
630 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
631 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
633 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
635 "new_pc = (etiss_int64)cast_0 + imm_extended;\n"
636 #if RISCV64_DEBUG_CALL
637 "printf(\"new_pc = %#lx\\n\",new_pc); \n"
642 #if RISCV64_DEBUG_CALL
643 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
652 "cpu->instructionPointer = (new_pc & ~1)&0xffffffffffffffff;\n"
653 #if RISCV64_DEBUG_CALL
654 "printf(\"cpu->instructionPointer = %#lx\\n\",cpu->instructionPointer); \n"
657 "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n"
699 partInit.
code() = std::string(
"//beq\n")+
700 "etiss_uint32 temp = 0;\n"
701 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
702 #if RISCV64_Pipeline1
703 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
704 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
705 "etiss_uint32 num_stages = 4;\n"
706 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
707 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
709 #if RISCV64_Pipeline2
710 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
711 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
712 "etiss_uint32 num_stages = 4;\n"
713 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
714 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
717 "etiss_int64 imm_extended = 0;\n"
718 "etiss_int64 choose1 = 0;\n"
720 "if((" +
toString(imm) +
" & 0x1000)>>12 == 0)\n"
722 "imm_extended = 0;\n"
723 #if RISCV64_DEBUG_CALL
724 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
730 "imm_extended = 4294967295;\n"
731 #if RISCV64_DEBUG_CALL
732 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
734 "imm_extended = (imm_extended << 32);\n"
735 #if RISCV64_DEBUG_CALL
736 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
738 "imm_extended = imm_extended + 4294959104;\n"
739 #if RISCV64_DEBUG_CALL
740 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
743 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
744 #if RISCV64_DEBUG_CALL
745 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
747 "if(*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] == *((RISCV64*)cpu)->X[" +
toString(rs2) +
"])\n"
750 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
752 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
754 "choose1 = (etiss_int64)cast_0 + imm_extended;\n"
755 #if RISCV64_DEBUG_CALL
756 "printf(\"choose1 = %#lx\\n\",choose1); \n"
765 #if RISCV64_DEBUG_CALL
766 "printf(\"choose1 = %#lx\\n\",choose1); \n"
769 "cpu->instructionPointer = choose1;\n"
770 #if RISCV64_DEBUG_CALL
771 "printf(\"cpu->instructionPointer = %#lx\\n\",cpu->instructionPointer); \n"
774 "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n"
807 partInit.
code() = std::string(
"//lb\n")+
808 "etiss_uint32 exception = 0;\n"
809 "etiss_uint32 temp = 0;\n"
810 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
811 #if RISCV64_Pipeline1
812 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
813 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
814 "etiss_uint32 num_stages = 4;\n"
815 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
816 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
818 #if RISCV64_Pipeline2
819 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
820 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
821 "etiss_uint32 num_stages = 4;\n"
822 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
823 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
826 "etiss_int64 offs = 0;\n"
827 "etiss_int64 imm_extended = 0;\n"
829 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
831 "imm_extended = 0;\n"
832 #if RISCV64_DEBUG_CALL
833 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
839 "imm_extended = 4294967295;\n"
840 #if RISCV64_DEBUG_CALL
841 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
843 "imm_extended = (imm_extended << 32);\n"
844 #if RISCV64_DEBUG_CALL
845 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
847 "imm_extended = imm_extended + 4294963200;\n"
848 #if RISCV64_DEBUG_CALL
849 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
852 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
853 #if RISCV64_DEBUG_CALL
854 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
856 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
857 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
859 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
861 "offs = (etiss_int64)cast_0 + imm_extended;\n"
862 #if RISCV64_DEBUG_CALL
863 "printf(\"offs = %#lx\\n\",offs); \n"
867 "etiss_uint8 MEM_offs;\n"
868 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
869 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,1);\n"
870 "etiss_int8 cast_1 = MEM_offs; \n"
871 "if((etiss_int8)((etiss_uint8)cast_1 - 0x80) > 0x0)\n"
873 "cast_1 =0x0 + (etiss_uint8)cast_1 ;\n"
875 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_1;\n"
876 #if RISCV64_DEBUG_CALL
877 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
884 "return exception;\n"
918 partInit.
code() = std::string(
"//sb\n")+
919 "etiss_uint32 exception = 0;\n"
920 "etiss_uint32 temp = 0;\n"
921 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
922 #if RISCV64_Pipeline1
923 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
924 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
925 "etiss_uint32 num_stages = 4;\n"
926 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
927 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
929 #if RISCV64_Pipeline2
930 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
931 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
932 "etiss_uint32 num_stages = 4;\n"
933 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
934 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
937 "etiss_int64 offs = 0;\n"
938 "etiss_int64 imm_extended = 0;\n"
940 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
942 "imm_extended = 0;\n"
943 #if RISCV64_DEBUG_CALL
944 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
950 "imm_extended = 4294967295;\n"
951 #if RISCV64_DEBUG_CALL
952 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
954 "imm_extended = (imm_extended << 32);\n"
955 #if RISCV64_DEBUG_CALL
956 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
958 "imm_extended = imm_extended + 4294963200;\n"
959 #if RISCV64_DEBUG_CALL
960 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
963 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
964 #if RISCV64_DEBUG_CALL
965 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
967 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
968 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
970 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
972 "offs = (etiss_int64)cast_0 + imm_extended;\n"
973 #if RISCV64_DEBUG_CALL
974 "printf(\"offs = %#lx\\n\",offs); \n"
976 "etiss_uint8 MEM_offs;\n"
977 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
978 "MEM_offs = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
979 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,1);\n"
980 #if RISCV64_DEBUG_CALL
981 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
983 "if((offs + 1 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
985 "((RISCV64*)cpu)->RES = 0;\n"
986 #if RISCV64_DEBUG_CALL
987 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
994 "return exception;\n"
1025 partInit.
code() = std::string(
"//addi\n")+
1026 "etiss_uint32 temp = 0;\n"
1027 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
1028 #if RISCV64_Pipeline1
1029 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
1030 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
1031 "etiss_uint32 num_stages = 4;\n"
1032 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
1033 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
1035 #if RISCV64_Pipeline2
1036 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
1037 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
1038 "etiss_uint32 num_stages = 4;\n"
1039 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
1040 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
1043 "etiss_int64 imm_extended = 0;\n"
1045 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
1047 "imm_extended = 0;\n"
1048 #if RISCV64_DEBUG_CALL
1049 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
1055 "imm_extended = 4294967295;\n"
1056 #if RISCV64_DEBUG_CALL
1057 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
1059 "imm_extended = (imm_extended << 32);\n"
1060 #if RISCV64_DEBUG_CALL
1061 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
1063 "imm_extended = imm_extended + 4294963200;\n"
1064 #if RISCV64_DEBUG_CALL
1065 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
1068 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
1069 #if RISCV64_DEBUG_CALL
1070 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
1074 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
1075 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
1077 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
1079 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0 + imm_extended;\n"
1080 #if RISCV64_DEBUG_CALL
1081 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
1118 partInit.
code() = std::string(
"//addiw\n")+
1119 "etiss_uint32 temp = 0;\n"
1120 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
1121 #if RISCV64_Pipeline1
1122 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
1123 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
1124 "etiss_uint32 num_stages = 4;\n"
1125 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
1126 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
1128 #if RISCV64_Pipeline2
1129 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
1130 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
1131 "etiss_uint32 num_stages = 4;\n"
1132 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
1133 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
1136 "etiss_int64 imm_extended = 0;\n"
1137 "etiss_int32 res = 0;\n"
1139 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
1141 "imm_extended = 0;\n"
1142 #if RISCV64_DEBUG_CALL
1143 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
1149 "imm_extended = 4294967295;\n"
1150 #if RISCV64_DEBUG_CALL
1151 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
1153 "imm_extended = (imm_extended << 32);\n"
1154 #if RISCV64_DEBUG_CALL
1155 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
1157 "imm_extended = imm_extended + 4294963200;\n"
1158 #if RISCV64_DEBUG_CALL
1159 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
1162 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
1163 #if RISCV64_DEBUG_CALL
1164 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
1168 "etiss_int64 cast_0 = (*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff); \n"
1169 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
1171 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
1173 "res = (etiss_int32)cast_0 + imm_extended;\n"
1174 #if RISCV64_DEBUG_CALL
1175 "printf(\"res = %#x\\n\",res); \n"
1177 "etiss_int32 cast_1 = res; \n"
1178 "if((etiss_int32)((etiss_uint32)cast_1 - 0x80000000) > 0x0)\n"
1180 "cast_1 =0x0 + (etiss_uint32)cast_1 ;\n"
1182 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_1;\n"
1183 #if RISCV64_DEBUG_CALL
1184 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
1230 partInit.
code() = std::string(
"//bne\n")+
1231 "etiss_uint32 temp = 0;\n"
1232 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
1233 #if RISCV64_Pipeline1
1234 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
1235 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
1236 "etiss_uint32 num_stages = 4;\n"
1237 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
1238 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
1240 #if RISCV64_Pipeline2
1241 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
1242 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
1243 "etiss_uint32 num_stages = 4;\n"
1244 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
1245 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
1248 "etiss_int64 imm_extended = 0;\n"
1249 "etiss_int64 choose1 = 0;\n"
1251 "if((" +
toString(imm) +
" & 0x1000)>>12 == 0)\n"
1253 "imm_extended = 0;\n"
1254 #if RISCV64_DEBUG_CALL
1255 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
1261 "imm_extended = 4294967295;\n"
1262 #if RISCV64_DEBUG_CALL
1263 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
1265 "imm_extended = (imm_extended << 32);\n"
1266 #if RISCV64_DEBUG_CALL
1267 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
1269 "imm_extended = imm_extended + 4294959104;\n"
1270 #if RISCV64_DEBUG_CALL
1271 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
1274 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
1275 #if RISCV64_DEBUG_CALL
1276 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
1278 "if(*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] != *((RISCV64*)cpu)->X[" +
toString(rs2) +
"])\n"
1281 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
1283 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
1285 "choose1 = (etiss_int64)cast_0 + imm_extended;\n"
1286 #if RISCV64_DEBUG_CALL
1287 "printf(\"choose1 = %#lx\\n\",choose1); \n"
1296 #if RISCV64_DEBUG_CALL
1297 "printf(\"choose1 = %#lx\\n\",choose1); \n"
1300 "cpu->instructionPointer = choose1;\n"
1301 #if RISCV64_DEBUG_CALL
1302 "printf(\"cpu->instructionPointer = %#lx\\n\",cpu->instructionPointer); \n"
1305 "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n"
1338 partInit.
code() = std::string(
"//lh\n")+
1339 "etiss_uint32 exception = 0;\n"
1340 "etiss_uint32 temp = 0;\n"
1341 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
1342 #if RISCV64_Pipeline1
1343 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
1344 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
1345 "etiss_uint32 num_stages = 4;\n"
1346 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
1347 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
1349 #if RISCV64_Pipeline2
1350 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
1351 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
1352 "etiss_uint32 num_stages = 4;\n"
1353 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
1354 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
1357 "etiss_int64 offs = 0;\n"
1358 "etiss_int64 imm_extended = 0;\n"
1360 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
1362 "imm_extended = 0;\n"
1363 #if RISCV64_DEBUG_CALL
1364 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
1370 "imm_extended = 4294967295;\n"
1371 #if RISCV64_DEBUG_CALL
1372 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
1374 "imm_extended = (imm_extended << 32);\n"
1375 #if RISCV64_DEBUG_CALL
1376 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
1378 "imm_extended = imm_extended + 4294963200;\n"
1379 #if RISCV64_DEBUG_CALL
1380 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
1383 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
1384 #if RISCV64_DEBUG_CALL
1385 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
1387 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
1388 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
1390 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
1392 "offs = (etiss_int64)cast_0 + imm_extended;\n"
1393 #if RISCV64_DEBUG_CALL
1394 "printf(\"offs = %#lx\\n\",offs); \n"
1398 "etiss_uint16 MEM_offs;\n"
1399 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
1400 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,2);\n"
1401 "etiss_int16 cast_1 = MEM_offs; \n"
1402 "if((etiss_int16)((etiss_uint16)cast_1 - 0x8000) > 0x0)\n"
1404 "cast_1 =0x0 + (etiss_uint16)cast_1 ;\n"
1406 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_1;\n"
1407 #if RISCV64_DEBUG_CALL
1408 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
1415 "return exception;\n"
1449 partInit.
code() = std::string(
"//sh\n")+
1450 "etiss_uint32 exception = 0;\n"
1451 "etiss_uint32 temp = 0;\n"
1452 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
1453 #if RISCV64_Pipeline1
1454 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
1455 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
1456 "etiss_uint32 num_stages = 4;\n"
1457 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
1458 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
1460 #if RISCV64_Pipeline2
1461 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
1462 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
1463 "etiss_uint32 num_stages = 4;\n"
1464 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
1465 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
1468 "etiss_int64 offs = 0;\n"
1469 "etiss_int64 imm_extended = 0;\n"
1471 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
1473 "imm_extended = 0;\n"
1474 #if RISCV64_DEBUG_CALL
1475 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
1481 "imm_extended = 4294967295;\n"
1482 #if RISCV64_DEBUG_CALL
1483 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
1485 "imm_extended = (imm_extended << 32);\n"
1486 #if RISCV64_DEBUG_CALL
1487 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
1489 "imm_extended = imm_extended + 4294963200;\n"
1490 #if RISCV64_DEBUG_CALL
1491 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
1494 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
1495 #if RISCV64_DEBUG_CALL
1496 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
1498 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
1499 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
1501 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
1503 "offs = (etiss_int64)cast_0 + imm_extended;\n"
1504 #if RISCV64_DEBUG_CALL
1505 "printf(\"offs = %#lx\\n\",offs); \n"
1507 "etiss_uint16 MEM_offs;\n"
1508 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
1509 "MEM_offs = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
1510 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,2);\n"
1511 #if RISCV64_DEBUG_CALL
1512 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
1514 "if((offs + 2 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
1516 "((RISCV64*)cpu)->RES = 0;\n"
1517 #if RISCV64_DEBUG_CALL
1518 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
1525 "return exception;\n"
1555 partInit.
code() = std::string(
"//fence_i\n")+
1556 "etiss_uint32 temp = 0;\n"
1557 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
1558 #if RISCV64_Pipeline1
1559 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
1560 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
1561 "etiss_uint32 num_stages = 4;\n"
1562 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
1563 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
1565 #if RISCV64_Pipeline2
1566 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
1567 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
1568 "etiss_uint32 num_stages = 4;\n"
1569 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
1570 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
1574 "((RISCV64*)cpu)->FENCE[1] = " +
toString(imm) +
";\n"
1575 #if RISCV64_DEBUG_CALL
1576 "printf(\"((RISCV64*)cpu)->FENCE[1] = %#lx\\n\",((RISCV64*)cpu)->FENCE[1]); \n"
1611 partInit.
code() = std::string(
"//csrrw\n")+
1612 "etiss_uint32 temp = 0;\n"
1613 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
1614 #if RISCV64_Pipeline1
1615 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
1616 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
1617 "etiss_uint32 num_stages = 4;\n"
1618 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
1619 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
1621 #if RISCV64_Pipeline2
1622 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
1623 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
1624 "etiss_uint32 num_stages = 4;\n"
1625 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
1626 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
1629 "etiss_int64 mAddr = 0;\n"
1630 "etiss_int64 writeMask = 0;\n"
1631 "etiss_int64 writeMaskU = 0;\n"
1632 "etiss_int64 sAddr = 0;\n"
1633 "etiss_int64 writeMaskS = 0;\n"
1634 "etiss_int64 uAddr = 0;\n"
1635 "etiss_uint64 rs_val = 0;\n"
1636 "etiss_uint64 csr_val = 0;\n"
1637 "etiss_int64 writeMaskM = 0;\n"
1639 "rs_val = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
1640 #if RISCV64_DEBUG_CALL
1641 "printf(\"rs_val = %#lx\\n\",rs_val); \n"
1645 "csr_val = ((RISCV64*)cpu)->CSR[" +
toString(csr) +
"];\n"
1646 #if RISCV64_DEBUG_CALL
1647 "printf(\"csr_val = %#lx\\n\",csr_val); \n"
1652 #if RISCV64_DEBUG_CALL
1653 "printf(\"uAddr = %#lx\\n\",uAddr); \n"
1656 #if RISCV64_DEBUG_CALL
1657 "printf(\"sAddr = %#lx\\n\",sAddr); \n"
1660 #if RISCV64_DEBUG_CALL
1661 "printf(\"mAddr = %#lx\\n\",mAddr); \n"
1663 "writeMaskM = -9223372036846388805;\n"
1664 #if RISCV64_DEBUG_CALL
1665 "printf(\"writeMaskM = %#lx\\n\",writeMaskM); \n"
1667 "writeMaskS = -9223372036853866189;\n"
1668 #if RISCV64_DEBUG_CALL
1669 "printf(\"writeMaskS = %#lx\\n\",writeMaskS); \n"
1671 "writeMaskU = -9223372036853866479;\n"
1672 #if RISCV64_DEBUG_CALL
1673 "printf(\"writeMaskU = %#lx\\n\",writeMaskU); \n"
1680 #if RISCV64_DEBUG_CALL
1681 "printf(\"uAddr = %#lx\\n\",uAddr); \n"
1684 #if RISCV64_DEBUG_CALL
1685 "printf(\"sAddr = %#lx\\n\",sAddr); \n"
1688 #if RISCV64_DEBUG_CALL
1689 "printf(\"mAddr = %#lx\\n\",mAddr); \n"
1691 "writeMaskM = 3003;\n"
1692 #if RISCV64_DEBUG_CALL
1693 "printf(\"writeMaskM = %#lx\\n\",writeMaskM); \n"
1695 "writeMaskS = 819;\n"
1696 #if RISCV64_DEBUG_CALL
1697 "printf(\"writeMaskS = %#lx\\n\",writeMaskS); \n"
1699 "writeMaskU = 273;\n"
1700 #if RISCV64_DEBUG_CALL
1701 "printf(\"writeMaskU = %#lx\\n\",writeMaskU); \n"
1708 #if RISCV64_DEBUG_CALL
1709 "printf(\"uAddr = %#lx\\n\",uAddr); \n"
1712 #if RISCV64_DEBUG_CALL
1713 "printf(\"sAddr = %#lx\\n\",sAddr); \n"
1716 #if RISCV64_DEBUG_CALL
1717 "printf(\"mAddr = %#lx\\n\",mAddr); \n"
1719 "writeMaskM = 3003;\n"
1720 #if RISCV64_DEBUG_CALL
1721 "printf(\"writeMaskM = %#lx\\n\",writeMaskM); \n"
1723 "writeMaskS = 819;\n"
1724 #if RISCV64_DEBUG_CALL
1725 "printf(\"writeMaskS = %#lx\\n\",writeMaskS); \n"
1727 "writeMaskU = 273;\n"
1728 #if RISCV64_DEBUG_CALL
1729 "printf(\"writeMaskU = %#lx\\n\",writeMaskU); \n"
1733 "if(uAddr != sAddr)\n"
1735 "if(((RISCV64*)cpu)->CSR[3088] == 3)\n"
1737 "writeMask = writeMaskM;\n"
1738 #if RISCV64_DEBUG_CALL
1739 "printf(\"writeMask = %#lx\\n\",writeMask); \n"
1743 "if(((RISCV64*)cpu)->CSR[3088] == 1)\n"
1745 "writeMask = writeMaskS;\n"
1746 #if RISCV64_DEBUG_CALL
1747 "printf(\"writeMask = %#lx\\n\",writeMask); \n"
1751 "if(((RISCV64*)cpu)->CSR[3088] == 0)\n"
1753 "writeMask = writeMaskU;\n"
1754 #if RISCV64_DEBUG_CALL
1755 "printf(\"writeMask = %#lx\\n\",writeMask); \n"
1759 "((RISCV64*)cpu)->CSR[uAddr] = ((((RISCV64*)cpu)->CSR[uAddr] & ~writeMask) | (rs_val & writeMask))&0xffffffffffffffff;\n"
1760 #if RISCV64_DEBUG_CALL
1761 "printf(\"((RISCV64*)cpu)->CSR[uAddr] = %#lx\\n\",((RISCV64*)cpu)->CSR[uAddr]); \n"
1763 "((RISCV64*)cpu)->CSR[sAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n"
1764 #if RISCV64_DEBUG_CALL
1765 "printf(\"((RISCV64*)cpu)->CSR[sAddr] = %#lx\\n\",((RISCV64*)cpu)->CSR[sAddr]); \n"
1767 "((RISCV64*)cpu)->CSR[mAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n"
1768 #if RISCV64_DEBUG_CALL
1769 "printf(\"((RISCV64*)cpu)->CSR[mAddr] = %#lx\\n\",((RISCV64*)cpu)->CSR[mAddr]); \n"
1775 "((RISCV64*)cpu)->CSR[" +
toString(csr) +
"] = rs_val;\n"
1776 #if RISCV64_DEBUG_CALL
1777 "printf(\"((RISCV64*)cpu)->CSR[" +
toString(csr) +
"] = %#lx\\n\",((RISCV64*)cpu)->CSR[" +
toString(csr) +
"]); \n"
1780 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = csr_val;\n"
1781 #if RISCV64_DEBUG_CALL
1782 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
1791 #if RISCV64_DEBUG_CALL
1792 "printf(\"uAddr = %#lx\\n\",uAddr); \n"
1795 #if RISCV64_DEBUG_CALL
1796 "printf(\"sAddr = %#lx\\n\",sAddr); \n"
1799 #if RISCV64_DEBUG_CALL
1800 "printf(\"mAddr = %#lx\\n\",mAddr); \n"
1802 "writeMaskM = -9223372036846388805;\n"
1803 #if RISCV64_DEBUG_CALL
1804 "printf(\"writeMaskM = %#lx\\n\",writeMaskM); \n"
1806 "writeMaskS = -9223372036853866189;\n"
1807 #if RISCV64_DEBUG_CALL
1808 "printf(\"writeMaskS = %#lx\\n\",writeMaskS); \n"
1810 "writeMaskU = -9223372036853866479;\n"
1811 #if RISCV64_DEBUG_CALL
1812 "printf(\"writeMaskU = %#lx\\n\",writeMaskU); \n"
1819 #if RISCV64_DEBUG_CALL
1820 "printf(\"uAddr = %#lx\\n\",uAddr); \n"
1823 #if RISCV64_DEBUG_CALL
1824 "printf(\"sAddr = %#lx\\n\",sAddr); \n"
1827 #if RISCV64_DEBUG_CALL
1828 "printf(\"mAddr = %#lx\\n\",mAddr); \n"
1830 "writeMaskM = 3003;\n"
1831 #if RISCV64_DEBUG_CALL
1832 "printf(\"writeMaskM = %#lx\\n\",writeMaskM); \n"
1834 "writeMaskS = 819;\n"
1835 #if RISCV64_DEBUG_CALL
1836 "printf(\"writeMaskS = %#lx\\n\",writeMaskS); \n"
1838 "writeMaskU = 273;\n"
1839 #if RISCV64_DEBUG_CALL
1840 "printf(\"writeMaskU = %#lx\\n\",writeMaskU); \n"
1847 #if RISCV64_DEBUG_CALL
1848 "printf(\"uAddr = %#lx\\n\",uAddr); \n"
1851 #if RISCV64_DEBUG_CALL
1852 "printf(\"sAddr = %#lx\\n\",sAddr); \n"
1855 #if RISCV64_DEBUG_CALL
1856 "printf(\"mAddr = %#lx\\n\",mAddr); \n"
1858 "writeMaskM = 3003;\n"
1859 #if RISCV64_DEBUG_CALL
1860 "printf(\"writeMaskM = %#lx\\n\",writeMaskM); \n"
1862 "writeMaskS = 819;\n"
1863 #if RISCV64_DEBUG_CALL
1864 "printf(\"writeMaskS = %#lx\\n\",writeMaskS); \n"
1866 "writeMaskU = 273;\n"
1867 #if RISCV64_DEBUG_CALL
1868 "printf(\"writeMaskU = %#lx\\n\",writeMaskU); \n"
1872 "if(uAddr != sAddr)\n"
1874 "if(((RISCV64*)cpu)->CSR[3088] == 3)\n"
1876 "writeMask = writeMaskM;\n"
1877 #if RISCV64_DEBUG_CALL
1878 "printf(\"writeMask = %#lx\\n\",writeMask); \n"
1882 "if(((RISCV64*)cpu)->CSR[3088] == 1)\n"
1884 "writeMask = writeMaskS;\n"
1885 #if RISCV64_DEBUG_CALL
1886 "printf(\"writeMask = %#lx\\n\",writeMask); \n"
1890 "if(((RISCV64*)cpu)->CSR[3088] == 0)\n"
1892 "writeMask = writeMaskU;\n"
1893 #if RISCV64_DEBUG_CALL
1894 "printf(\"writeMask = %#lx\\n\",writeMask); \n"
1898 "((RISCV64*)cpu)->CSR[uAddr] = ((((RISCV64*)cpu)->CSR[uAddr] & ~writeMask) | (rs_val & writeMask))&0xffffffffffffffff;\n"
1899 #if RISCV64_DEBUG_CALL
1900 "printf(\"((RISCV64*)cpu)->CSR[uAddr] = %#lx\\n\",((RISCV64*)cpu)->CSR[uAddr]); \n"
1902 "((RISCV64*)cpu)->CSR[sAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n"
1903 #if RISCV64_DEBUG_CALL
1904 "printf(\"((RISCV64*)cpu)->CSR[sAddr] = %#lx\\n\",((RISCV64*)cpu)->CSR[sAddr]); \n"
1906 "((RISCV64*)cpu)->CSR[mAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n"
1907 #if RISCV64_DEBUG_CALL
1908 "printf(\"((RISCV64*)cpu)->CSR[mAddr] = %#lx\\n\",((RISCV64*)cpu)->CSR[mAddr]); \n"
1914 "((RISCV64*)cpu)->CSR[" +
toString(csr) +
"] = rs_val;\n"
1915 #if RISCV64_DEBUG_CALL
1916 "printf(\"((RISCV64*)cpu)->CSR[" +
toString(csr) +
"] = %#lx\\n\",((RISCV64*)cpu)->CSR[" +
toString(csr) +
"]); \n"
1962 partInit.
code() = std::string(
"//blt\n")+
1963 "etiss_uint32 temp = 0;\n"
1964 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
1965 #if RISCV64_Pipeline1
1966 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
1967 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
1968 "etiss_uint32 num_stages = 4;\n"
1969 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
1970 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
1972 #if RISCV64_Pipeline2
1973 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
1974 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
1975 "etiss_uint32 num_stages = 4;\n"
1976 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
1977 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
1980 "etiss_int64 imm_extended = 0;\n"
1981 "etiss_int64 choose1 = 0;\n"
1983 "if((" +
toString(imm) +
" & 0x1000)>>12 == 0)\n"
1985 "imm_extended = 0;\n"
1986 #if RISCV64_DEBUG_CALL
1987 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
1993 "imm_extended = 4294967295;\n"
1994 #if RISCV64_DEBUG_CALL
1995 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
1997 "imm_extended = (imm_extended << 32);\n"
1998 #if RISCV64_DEBUG_CALL
1999 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
2001 "imm_extended = imm_extended + 4294959104;\n"
2002 #if RISCV64_DEBUG_CALL
2003 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
2006 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
2007 #if RISCV64_DEBUG_CALL
2008 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
2010 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"]; \n"
2011 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
2013 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
2015 "etiss_int64 cast_1 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
2016 "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n"
2018 "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n"
2020 "if((etiss_int64)cast_1 < (etiss_int64)cast_0)\n"
2023 "if((etiss_int64)((etiss_uint64)cast_2 - 0x8000000000000000) > 0x0)\n"
2025 "cast_2 =0x0 + (etiss_uint64)cast_2 ;\n"
2027 "choose1 = (etiss_int64)cast_2 + imm_extended;\n"
2028 #if RISCV64_DEBUG_CALL
2029 "printf(\"choose1 = %#lx\\n\",choose1); \n"
2038 #if RISCV64_DEBUG_CALL
2039 "printf(\"choose1 = %#lx\\n\",choose1); \n"
2042 "cpu->instructionPointer = choose1;\n"
2043 #if RISCV64_DEBUG_CALL
2044 "printf(\"cpu->instructionPointer = %#lx\\n\",cpu->instructionPointer); \n"
2047 "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n"
2080 partInit.
code() = std::string(
"//lbu\n")+
2081 "etiss_uint32 exception = 0;\n"
2082 "etiss_uint32 temp = 0;\n"
2083 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
2084 #if RISCV64_Pipeline1
2085 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
2086 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
2087 "etiss_uint32 num_stages = 4;\n"
2088 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
2089 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
2091 #if RISCV64_Pipeline2
2092 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
2093 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
2094 "etiss_uint32 num_stages = 4;\n"
2095 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
2096 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
2099 "etiss_int64 offs = 0;\n"
2100 "etiss_int64 imm_extended = 0;\n"
2102 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
2104 "imm_extended = 0;\n"
2105 #if RISCV64_DEBUG_CALL
2106 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
2112 "imm_extended = 4294967295;\n"
2113 #if RISCV64_DEBUG_CALL
2114 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
2116 "imm_extended = (imm_extended << 32);\n"
2117 #if RISCV64_DEBUG_CALL
2118 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
2120 "imm_extended = imm_extended + 4294963200;\n"
2121 #if RISCV64_DEBUG_CALL
2122 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
2125 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
2126 #if RISCV64_DEBUG_CALL
2127 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
2129 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
2130 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
2132 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
2134 "offs = (etiss_int64)cast_0 + imm_extended;\n"
2135 #if RISCV64_DEBUG_CALL
2136 "printf(\"offs = %#lx\\n\",offs); \n"
2140 "etiss_uint8 MEM_offs;\n"
2141 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
2142 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,1);\n"
2143 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_uint64)MEM_offs;\n"
2144 #if RISCV64_DEBUG_CALL
2145 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
2152 "return exception;\n"
2183 partInit.
code() = std::string(
"//xori\n")+
2184 "etiss_uint32 temp = 0;\n"
2185 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
2186 #if RISCV64_Pipeline1
2187 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
2188 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
2189 "etiss_uint32 num_stages = 4;\n"
2190 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
2191 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
2193 #if RISCV64_Pipeline2
2194 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
2195 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
2196 "etiss_uint32 num_stages = 4;\n"
2197 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
2198 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
2201 "etiss_int64 imm_extended = 0;\n"
2203 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
2205 "imm_extended = 0;\n"
2206 #if RISCV64_DEBUG_CALL
2207 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
2213 "imm_extended = 4294967295;\n"
2214 #if RISCV64_DEBUG_CALL
2215 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
2217 "imm_extended = (imm_extended << 32);\n"
2218 #if RISCV64_DEBUG_CALL
2219 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
2221 "imm_extended = imm_extended + 4294963200;\n"
2222 #if RISCV64_DEBUG_CALL
2223 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
2226 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
2227 #if RISCV64_DEBUG_CALL
2228 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
2232 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
2233 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
2235 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
2237 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = ((etiss_int64)cast_0 ^ imm_extended);\n"
2238 #if RISCV64_DEBUG_CALL
2239 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
2285 partInit.
code() = std::string(
"//bge\n")+
2286 "etiss_uint32 temp = 0;\n"
2287 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
2288 #if RISCV64_Pipeline1
2289 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
2290 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
2291 "etiss_uint32 num_stages = 4;\n"
2292 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
2293 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
2295 #if RISCV64_Pipeline2
2296 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
2297 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
2298 "etiss_uint32 num_stages = 4;\n"
2299 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
2300 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
2303 "etiss_int64 imm_extended = 0;\n"
2304 "etiss_int64 choose1 = 0;\n"
2306 "if((" +
toString(imm) +
" & 0x1000)>>12 == 0)\n"
2308 "imm_extended = 0;\n"
2309 #if RISCV64_DEBUG_CALL
2310 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
2316 "imm_extended = 4294967295;\n"
2317 #if RISCV64_DEBUG_CALL
2318 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
2320 "imm_extended = (imm_extended << 32);\n"
2321 #if RISCV64_DEBUG_CALL
2322 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
2324 "imm_extended = imm_extended + 4294959104;\n"
2325 #if RISCV64_DEBUG_CALL
2326 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
2329 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
2330 #if RISCV64_DEBUG_CALL
2331 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
2333 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"]; \n"
2334 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
2336 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
2338 "etiss_int64 cast_1 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
2339 "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n"
2341 "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n"
2343 "if((etiss_int64)cast_1 >= (etiss_int64)cast_0)\n"
2346 "if((etiss_int64)((etiss_uint64)cast_2 - 0x8000000000000000) > 0x0)\n"
2348 "cast_2 =0x0 + (etiss_uint64)cast_2 ;\n"
2350 "choose1 = (etiss_int64)cast_2 + imm_extended;\n"
2351 #if RISCV64_DEBUG_CALL
2352 "printf(\"choose1 = %#lx\\n\",choose1); \n"
2361 #if RISCV64_DEBUG_CALL
2362 "printf(\"choose1 = %#lx\\n\",choose1); \n"
2365 "cpu->instructionPointer = choose1;\n"
2366 #if RISCV64_DEBUG_CALL
2367 "printf(\"cpu->instructionPointer = %#lx\\n\",cpu->instructionPointer); \n"
2370 "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n"
2403 partInit.
code() = std::string(
"//lhu\n")+
2404 "etiss_uint32 exception = 0;\n"
2405 "etiss_uint32 temp = 0;\n"
2406 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
2407 #if RISCV64_Pipeline1
2408 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
2409 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
2410 "etiss_uint32 num_stages = 4;\n"
2411 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
2412 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
2414 #if RISCV64_Pipeline2
2415 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
2416 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
2417 "etiss_uint32 num_stages = 4;\n"
2418 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
2419 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
2422 "etiss_int64 offs = 0;\n"
2423 "etiss_int64 imm_extended = 0;\n"
2425 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
2427 "imm_extended = 0;\n"
2428 #if RISCV64_DEBUG_CALL
2429 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
2435 "imm_extended = 4294967295;\n"
2436 #if RISCV64_DEBUG_CALL
2437 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
2439 "imm_extended = (imm_extended << 32);\n"
2440 #if RISCV64_DEBUG_CALL
2441 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
2443 "imm_extended = imm_extended + 4294963200;\n"
2444 #if RISCV64_DEBUG_CALL
2445 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
2448 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
2449 #if RISCV64_DEBUG_CALL
2450 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
2452 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
2453 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
2455 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
2457 "offs = (etiss_int64)cast_0 + imm_extended;\n"
2458 #if RISCV64_DEBUG_CALL
2459 "printf(\"offs = %#lx\\n\",offs); \n"
2463 "etiss_uint16 MEM_offs;\n"
2464 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
2465 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,2);\n"
2466 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_uint64)MEM_offs;\n"
2467 #if RISCV64_DEBUG_CALL
2468 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
2475 "return exception;\n"
2505 partInit.
code() = std::string(
"//csrrwi\n")+
2506 "etiss_uint32 temp = 0;\n"
2507 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
2508 #if RISCV64_Pipeline1
2509 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
2510 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
2511 "etiss_uint32 num_stages = 4;\n"
2512 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
2513 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
2515 #if RISCV64_Pipeline2
2516 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
2517 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
2518 "etiss_uint32 num_stages = 4;\n"
2519 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
2520 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
2523 "etiss_int64 mAddr = 0;\n"
2524 "etiss_int64 writeMask = 0;\n"
2525 "etiss_int64 writeMaskU = 0;\n"
2526 "etiss_int64 sAddr = 0;\n"
2527 "etiss_int64 writeMaskS = 0;\n"
2528 "etiss_int64 uAddr = 0;\n"
2529 "etiss_int64 writeMaskM = 0;\n"
2533 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = ((RISCV64*)cpu)->CSR[" +
toString(csr) +
"];\n"
2534 #if RISCV64_DEBUG_CALL
2535 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
2542 #if RISCV64_DEBUG_CALL
2543 "printf(\"uAddr = %#lx\\n\",uAddr); \n"
2546 #if RISCV64_DEBUG_CALL
2547 "printf(\"sAddr = %#lx\\n\",sAddr); \n"
2550 #if RISCV64_DEBUG_CALL
2551 "printf(\"mAddr = %#lx\\n\",mAddr); \n"
2553 "writeMaskM = -9223372036846388805;\n"
2554 #if RISCV64_DEBUG_CALL
2555 "printf(\"writeMaskM = %#lx\\n\",writeMaskM); \n"
2557 "writeMaskS = -9223372036853866189;\n"
2558 #if RISCV64_DEBUG_CALL
2559 "printf(\"writeMaskS = %#lx\\n\",writeMaskS); \n"
2561 "writeMaskU = -9223372036853866479;\n"
2562 #if RISCV64_DEBUG_CALL
2563 "printf(\"writeMaskU = %#lx\\n\",writeMaskU); \n"
2570 #if RISCV64_DEBUG_CALL
2571 "printf(\"uAddr = %#lx\\n\",uAddr); \n"
2574 #if RISCV64_DEBUG_CALL
2575 "printf(\"sAddr = %#lx\\n\",sAddr); \n"
2578 #if RISCV64_DEBUG_CALL
2579 "printf(\"mAddr = %#lx\\n\",mAddr); \n"
2581 "writeMaskM = 3003;\n"
2582 #if RISCV64_DEBUG_CALL
2583 "printf(\"writeMaskM = %#lx\\n\",writeMaskM); \n"
2585 "writeMaskS = 819;\n"
2586 #if RISCV64_DEBUG_CALL
2587 "printf(\"writeMaskS = %#lx\\n\",writeMaskS); \n"
2589 "writeMaskU = 273;\n"
2590 #if RISCV64_DEBUG_CALL
2591 "printf(\"writeMaskU = %#lx\\n\",writeMaskU); \n"
2598 #if RISCV64_DEBUG_CALL
2599 "printf(\"uAddr = %#lx\\n\",uAddr); \n"
2602 #if RISCV64_DEBUG_CALL
2603 "printf(\"sAddr = %#lx\\n\",sAddr); \n"
2606 #if RISCV64_DEBUG_CALL
2607 "printf(\"mAddr = %#lx\\n\",mAddr); \n"
2609 "writeMaskM = 3003;\n"
2610 #if RISCV64_DEBUG_CALL
2611 "printf(\"writeMaskM = %#lx\\n\",writeMaskM); \n"
2613 "writeMaskS = 819;\n"
2614 #if RISCV64_DEBUG_CALL
2615 "printf(\"writeMaskS = %#lx\\n\",writeMaskS); \n"
2617 "writeMaskU = 273;\n"
2618 #if RISCV64_DEBUG_CALL
2619 "printf(\"writeMaskU = %#lx\\n\",writeMaskU); \n"
2623 "if(uAddr != sAddr)\n"
2625 "if(((RISCV64*)cpu)->CSR[3088] == 3)\n"
2627 "writeMask = writeMaskM;\n"
2628 #if RISCV64_DEBUG_CALL
2629 "printf(\"writeMask = %#lx\\n\",writeMask); \n"
2633 "if(((RISCV64*)cpu)->CSR[3088] == 1)\n"
2635 "writeMask = writeMaskS;\n"
2636 #if RISCV64_DEBUG_CALL
2637 "printf(\"writeMask = %#lx\\n\",writeMask); \n"
2641 "if(((RISCV64*)cpu)->CSR[3088] == 0)\n"
2643 "writeMask = writeMaskU;\n"
2644 #if RISCV64_DEBUG_CALL
2645 "printf(\"writeMask = %#lx\\n\",writeMask); \n"
2649 "((RISCV64*)cpu)->CSR[uAddr] = ((((RISCV64*)cpu)->CSR[uAddr] & ~writeMask) | ((etiss_uint64)" +
toString(zimm) +
" & writeMask))&0xffffffffffffffff;\n"
2650 #if RISCV64_DEBUG_CALL
2651 "printf(\"((RISCV64*)cpu)->CSR[uAddr] = %#lx\\n\",((RISCV64*)cpu)->CSR[uAddr]); \n"
2653 "((RISCV64*)cpu)->CSR[sAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n"
2654 #if RISCV64_DEBUG_CALL
2655 "printf(\"((RISCV64*)cpu)->CSR[sAddr] = %#lx\\n\",((RISCV64*)cpu)->CSR[sAddr]); \n"
2657 "((RISCV64*)cpu)->CSR[mAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n"
2658 #if RISCV64_DEBUG_CALL
2659 "printf(\"((RISCV64*)cpu)->CSR[mAddr] = %#lx\\n\",((RISCV64*)cpu)->CSR[mAddr]); \n"
2665 "((RISCV64*)cpu)->CSR[" +
toString(csr) +
"] = (etiss_uint64)" +
toString(zimm) +
";\n"
2666 #if RISCV64_DEBUG_CALL
2667 "printf(\"((RISCV64*)cpu)->CSR[" +
toString(csr) +
"] = %#lx\\n\",((RISCV64*)cpu)->CSR[" +
toString(csr) +
"]); \n"
2712 partInit.
code() = std::string(
"//bltu\n")+
2713 "etiss_uint32 temp = 0;\n"
2714 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
2715 #if RISCV64_Pipeline1
2716 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
2717 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
2718 "etiss_uint32 num_stages = 4;\n"
2719 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
2720 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
2722 #if RISCV64_Pipeline2
2723 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
2724 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
2725 "etiss_uint32 num_stages = 4;\n"
2726 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
2727 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
2730 "etiss_int64 imm_extended = 0;\n"
2731 "etiss_int64 choose1 = 0;\n"
2733 "if((" +
toString(imm) +
" & 0x1000)>>12 == 0)\n"
2735 "imm_extended = 0;\n"
2736 #if RISCV64_DEBUG_CALL
2737 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
2743 "imm_extended = 4294967295;\n"
2744 #if RISCV64_DEBUG_CALL
2745 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
2747 "imm_extended = (imm_extended << 32);\n"
2748 #if RISCV64_DEBUG_CALL
2749 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
2751 "imm_extended = imm_extended + 4294959104;\n"
2752 #if RISCV64_DEBUG_CALL
2753 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
2756 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
2757 #if RISCV64_DEBUG_CALL
2758 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
2760 "if(*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] < *((RISCV64*)cpu)->X[" +
toString(rs2) +
"])\n"
2763 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
2765 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
2767 "choose1 = (etiss_int64)cast_0 + imm_extended;\n"
2768 #if RISCV64_DEBUG_CALL
2769 "printf(\"choose1 = %#lx\\n\",choose1); \n"
2778 #if RISCV64_DEBUG_CALL
2779 "printf(\"choose1 = %#lx\\n\",choose1); \n"
2782 "cpu->instructionPointer = choose1;\n"
2783 #if RISCV64_DEBUG_CALL
2784 "printf(\"cpu->instructionPointer = %#lx\\n\",cpu->instructionPointer); \n"
2787 "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n"
2820 partInit.
code() = std::string(
"//ori\n")+
2821 "etiss_uint32 temp = 0;\n"
2822 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
2823 #if RISCV64_Pipeline1
2824 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
2825 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
2826 "etiss_uint32 num_stages = 4;\n"
2827 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
2828 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
2830 #if RISCV64_Pipeline2
2831 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
2832 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
2833 "etiss_uint32 num_stages = 4;\n"
2834 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
2835 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
2838 "etiss_int64 imm_extended = 0;\n"
2840 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
2842 "imm_extended = 0;\n"
2843 #if RISCV64_DEBUG_CALL
2844 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
2850 "imm_extended = 4294967295;\n"
2851 #if RISCV64_DEBUG_CALL
2852 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
2854 "imm_extended = (imm_extended << 32);\n"
2855 #if RISCV64_DEBUG_CALL
2856 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
2858 "imm_extended = imm_extended + 4294963200;\n"
2859 #if RISCV64_DEBUG_CALL
2860 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
2863 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
2864 #if RISCV64_DEBUG_CALL
2865 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
2869 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
2870 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
2872 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
2874 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = ((etiss_int64)cast_0 | imm_extended);\n"
2875 #if RISCV64_DEBUG_CALL
2876 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
2912 partInit.
code() = std::string(
"//csrrsi\n")+
2913 "etiss_uint32 temp = 0;\n"
2914 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
2915 #if RISCV64_Pipeline1
2916 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
2917 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
2918 "etiss_uint32 num_stages = 4;\n"
2919 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
2920 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
2922 #if RISCV64_Pipeline2
2923 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
2924 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
2925 "etiss_uint32 num_stages = 4;\n"
2926 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
2927 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
2930 "etiss_uint64 res = 0;\n"
2931 "etiss_int64 mAddr = 0;\n"
2932 "etiss_int64 writeMask = 0;\n"
2933 "etiss_int64 writeMaskU = 0;\n"
2934 "etiss_int64 sAddr = 0;\n"
2935 "etiss_int64 writeMaskS = 0;\n"
2936 "etiss_int64 uAddr = 0;\n"
2937 "etiss_int64 writeMaskM = 0;\n"
2939 "res = ((RISCV64*)cpu)->CSR[" +
toString(csr) +
"];\n"
2940 #if RISCV64_DEBUG_CALL
2941 "printf(\"res = %#lx\\n\",res); \n"
2943 "if(" +
toString(zimm) +
" != 0)\n"
2948 #if RISCV64_DEBUG_CALL
2949 "printf(\"uAddr = %#lx\\n\",uAddr); \n"
2952 #if RISCV64_DEBUG_CALL
2953 "printf(\"sAddr = %#lx\\n\",sAddr); \n"
2956 #if RISCV64_DEBUG_CALL
2957 "printf(\"mAddr = %#lx\\n\",mAddr); \n"
2959 "writeMaskM = -9223372036846388805;\n"
2960 #if RISCV64_DEBUG_CALL
2961 "printf(\"writeMaskM = %#lx\\n\",writeMaskM); \n"
2963 "writeMaskS = -9223372036853866189;\n"
2964 #if RISCV64_DEBUG_CALL
2965 "printf(\"writeMaskS = %#lx\\n\",writeMaskS); \n"
2967 "writeMaskU = -9223372036853866479;\n"
2968 #if RISCV64_DEBUG_CALL
2969 "printf(\"writeMaskU = %#lx\\n\",writeMaskU); \n"
2976 #if RISCV64_DEBUG_CALL
2977 "printf(\"uAddr = %#lx\\n\",uAddr); \n"
2980 #if RISCV64_DEBUG_CALL
2981 "printf(\"sAddr = %#lx\\n\",sAddr); \n"
2984 #if RISCV64_DEBUG_CALL
2985 "printf(\"mAddr = %#lx\\n\",mAddr); \n"
2987 "writeMaskM = 3003;\n"
2988 #if RISCV64_DEBUG_CALL
2989 "printf(\"writeMaskM = %#lx\\n\",writeMaskM); \n"
2991 "writeMaskS = 819;\n"
2992 #if RISCV64_DEBUG_CALL
2993 "printf(\"writeMaskS = %#lx\\n\",writeMaskS); \n"
2995 "writeMaskU = 273;\n"
2996 #if RISCV64_DEBUG_CALL
2997 "printf(\"writeMaskU = %#lx\\n\",writeMaskU); \n"
3004 #if RISCV64_DEBUG_CALL
3005 "printf(\"uAddr = %#lx\\n\",uAddr); \n"
3008 #if RISCV64_DEBUG_CALL
3009 "printf(\"sAddr = %#lx\\n\",sAddr); \n"
3012 #if RISCV64_DEBUG_CALL
3013 "printf(\"mAddr = %#lx\\n\",mAddr); \n"
3015 "writeMaskM = 3003;\n"
3016 #if RISCV64_DEBUG_CALL
3017 "printf(\"writeMaskM = %#lx\\n\",writeMaskM); \n"
3019 "writeMaskS = 819;\n"
3020 #if RISCV64_DEBUG_CALL
3021 "printf(\"writeMaskS = %#lx\\n\",writeMaskS); \n"
3023 "writeMaskU = 273;\n"
3024 #if RISCV64_DEBUG_CALL
3025 "printf(\"writeMaskU = %#lx\\n\",writeMaskU); \n"
3029 "if(uAddr != sAddr)\n"
3031 "if(((RISCV64*)cpu)->CSR[3088] == 3)\n"
3033 "writeMask = writeMaskM;\n"
3034 #if RISCV64_DEBUG_CALL
3035 "printf(\"writeMask = %#lx\\n\",writeMask); \n"
3039 "if(((RISCV64*)cpu)->CSR[3088] == 1)\n"
3041 "writeMask = writeMaskS;\n"
3042 #if RISCV64_DEBUG_CALL
3043 "printf(\"writeMask = %#lx\\n\",writeMask); \n"
3047 "if(((RISCV64*)cpu)->CSR[3088] == 0)\n"
3049 "writeMask = writeMaskU;\n"
3050 #if RISCV64_DEBUG_CALL
3051 "printf(\"writeMask = %#lx\\n\",writeMask); \n"
3055 "((RISCV64*)cpu)->CSR[uAddr] = ((((RISCV64*)cpu)->CSR[uAddr] & ~writeMask) | ((res | (etiss_uint64)" +
toString(zimm) +
") & writeMask))&0xffffffffffffffff;\n"
3056 #if RISCV64_DEBUG_CALL
3057 "printf(\"((RISCV64*)cpu)->CSR[uAddr] = %#lx\\n\",((RISCV64*)cpu)->CSR[uAddr]); \n"
3059 "((RISCV64*)cpu)->CSR[sAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n"
3060 #if RISCV64_DEBUG_CALL
3061 "printf(\"((RISCV64*)cpu)->CSR[sAddr] = %#lx\\n\",((RISCV64*)cpu)->CSR[sAddr]); \n"
3063 "((RISCV64*)cpu)->CSR[mAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n"
3064 #if RISCV64_DEBUG_CALL
3065 "printf(\"((RISCV64*)cpu)->CSR[mAddr] = %#lx\\n\",((RISCV64*)cpu)->CSR[mAddr]); \n"
3071 "((RISCV64*)cpu)->CSR[" +
toString(csr) +
"] = (res | (etiss_uint64)" +
toString(zimm) +
");\n"
3072 #if RISCV64_DEBUG_CALL
3073 "printf(\"((RISCV64*)cpu)->CSR[" +
toString(csr) +
"] = %#lx\\n\",((RISCV64*)cpu)->CSR[" +
toString(csr) +
"]); \n"
3080 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = res;\n"
3081 #if RISCV64_DEBUG_CALL
3082 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
3119 partInit.
code() = std::string(
"//lwu\n")+
3120 "etiss_uint32 exception = 0;\n"
3121 "etiss_uint32 temp = 0;\n"
3122 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
3123 #if RISCV64_Pipeline1
3124 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
3125 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
3126 "etiss_uint32 num_stages = 4;\n"
3127 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
3128 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
3130 #if RISCV64_Pipeline2
3131 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
3132 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
3133 "etiss_uint32 num_stages = 4;\n"
3134 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
3135 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
3138 "etiss_int64 offs = 0;\n"
3139 "etiss_int64 imm_extended = 0;\n"
3141 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
3143 "imm_extended = 0;\n"
3144 #if RISCV64_DEBUG_CALL
3145 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
3151 "imm_extended = 4294967295;\n"
3152 #if RISCV64_DEBUG_CALL
3153 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
3155 "imm_extended = (imm_extended << 32);\n"
3156 #if RISCV64_DEBUG_CALL
3157 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
3159 "imm_extended = imm_extended + 4294963200;\n"
3160 #if RISCV64_DEBUG_CALL
3161 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
3164 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
3165 #if RISCV64_DEBUG_CALL
3166 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
3168 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
3169 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
3171 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
3173 "offs = (etiss_int64)cast_0 + imm_extended;\n"
3174 #if RISCV64_DEBUG_CALL
3175 "printf(\"offs = %#lx\\n\",offs); \n"
3179 "etiss_uint32 MEM_offs;\n"
3180 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
3181 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n"
3182 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_uint64)MEM_offs;\n"
3183 #if RISCV64_DEBUG_CALL
3184 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
3191 "return exception;\n"
3231 partInit.
code() = std::string(
"//bgeu\n")+
3232 "etiss_uint32 temp = 0;\n"
3233 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
3234 #if RISCV64_Pipeline1
3235 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
3236 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
3237 "etiss_uint32 num_stages = 4;\n"
3238 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
3239 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
3241 #if RISCV64_Pipeline2
3242 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
3243 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
3244 "etiss_uint32 num_stages = 4;\n"
3245 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
3246 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
3249 "etiss_int64 imm_extended = 0;\n"
3250 "etiss_int64 choose1 = 0;\n"
3252 "if((" +
toString(imm) +
" & 0x1000)>>12 == 0)\n"
3254 "imm_extended = 0;\n"
3255 #if RISCV64_DEBUG_CALL
3256 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
3262 "imm_extended = 4294967295;\n"
3263 #if RISCV64_DEBUG_CALL
3264 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
3266 "imm_extended = (imm_extended << 32);\n"
3267 #if RISCV64_DEBUG_CALL
3268 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
3270 "imm_extended = imm_extended + 4294959104;\n"
3271 #if RISCV64_DEBUG_CALL
3272 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
3275 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
3276 #if RISCV64_DEBUG_CALL
3277 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
3279 "if(*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] >= *((RISCV64*)cpu)->X[" +
toString(rs2) +
"])\n"
3282 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
3284 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
3286 "choose1 = (etiss_int64)cast_0 + imm_extended;\n"
3287 #if RISCV64_DEBUG_CALL
3288 "printf(\"choose1 = %#lx\\n\",choose1); \n"
3297 #if RISCV64_DEBUG_CALL
3298 "printf(\"choose1 = %#lx\\n\",choose1); \n"
3301 "cpu->instructionPointer = choose1;\n"
3302 #if RISCV64_DEBUG_CALL
3303 "printf(\"cpu->instructionPointer = %#lx\\n\",cpu->instructionPointer); \n"
3306 "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n"
3339 partInit.
code() = std::string(
"//andi\n")+
3340 "etiss_uint32 temp = 0;\n"
3341 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
3342 #if RISCV64_Pipeline1
3343 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
3344 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
3345 "etiss_uint32 num_stages = 4;\n"
3346 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
3347 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
3349 #if RISCV64_Pipeline2
3350 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
3351 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
3352 "etiss_uint32 num_stages = 4;\n"
3353 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
3354 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
3357 "etiss_int64 imm_extended = 0;\n"
3359 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
3361 "imm_extended = 0;\n"
3362 #if RISCV64_DEBUG_CALL
3363 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
3369 "imm_extended = 4294967295;\n"
3370 #if RISCV64_DEBUG_CALL
3371 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
3373 "imm_extended = (imm_extended << 32);\n"
3374 #if RISCV64_DEBUG_CALL
3375 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
3377 "imm_extended = imm_extended + 4294963200;\n"
3378 #if RISCV64_DEBUG_CALL
3379 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
3382 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
3383 #if RISCV64_DEBUG_CALL
3384 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
3388 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
3389 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
3391 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
3393 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = ((etiss_int64)cast_0 & imm_extended);\n"
3394 #if RISCV64_DEBUG_CALL
3395 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
3431 partInit.
code() = std::string(
"//csrrci\n")+
3432 "etiss_uint32 temp = 0;\n"
3433 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
3434 #if RISCV64_Pipeline1
3435 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
3436 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
3437 "etiss_uint32 num_stages = 4;\n"
3438 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
3439 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
3441 #if RISCV64_Pipeline2
3442 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
3443 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
3444 "etiss_uint32 num_stages = 4;\n"
3445 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
3446 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
3449 "etiss_uint64 res = 0;\n"
3450 "etiss_int64 mAddr = 0;\n"
3451 "etiss_int64 writeMask = 0;\n"
3452 "etiss_int64 writeMaskU = 0;\n"
3453 "etiss_int64 sAddr = 0;\n"
3454 "etiss_int64 writeMaskS = 0;\n"
3455 "etiss_int64 uAddr = 0;\n"
3456 "etiss_int64 writeMaskM = 0;\n"
3458 "res = ((RISCV64*)cpu)->CSR[" +
toString(csr) +
"];\n"
3459 #if RISCV64_DEBUG_CALL
3460 "printf(\"res = %#lx\\n\",res); \n"
3464 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = res;\n"
3465 #if RISCV64_DEBUG_CALL
3466 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
3470 "if(" +
toString(zimm) +
" != 0)\n"
3475 #if RISCV64_DEBUG_CALL
3476 "printf(\"uAddr = %#lx\\n\",uAddr); \n"
3479 #if RISCV64_DEBUG_CALL
3480 "printf(\"sAddr = %#lx\\n\",sAddr); \n"
3483 #if RISCV64_DEBUG_CALL
3484 "printf(\"mAddr = %#lx\\n\",mAddr); \n"
3486 "writeMaskM = -9223372036846388805;\n"
3487 #if RISCV64_DEBUG_CALL
3488 "printf(\"writeMaskM = %#lx\\n\",writeMaskM); \n"
3490 "writeMaskS = -9223372036853866189;\n"
3491 #if RISCV64_DEBUG_CALL
3492 "printf(\"writeMaskS = %#lx\\n\",writeMaskS); \n"
3494 "writeMaskU = -9223372036853866479;\n"
3495 #if RISCV64_DEBUG_CALL
3496 "printf(\"writeMaskU = %#lx\\n\",writeMaskU); \n"
3503 #if RISCV64_DEBUG_CALL
3504 "printf(\"uAddr = %#lx\\n\",uAddr); \n"
3507 #if RISCV64_DEBUG_CALL
3508 "printf(\"sAddr = %#lx\\n\",sAddr); \n"
3511 #if RISCV64_DEBUG_CALL
3512 "printf(\"mAddr = %#lx\\n\",mAddr); \n"
3514 "writeMaskM = 3003;\n"
3515 #if RISCV64_DEBUG_CALL
3516 "printf(\"writeMaskM = %#lx\\n\",writeMaskM); \n"
3518 "writeMaskS = 819;\n"
3519 #if RISCV64_DEBUG_CALL
3520 "printf(\"writeMaskS = %#lx\\n\",writeMaskS); \n"
3522 "writeMaskU = 273;\n"
3523 #if RISCV64_DEBUG_CALL
3524 "printf(\"writeMaskU = %#lx\\n\",writeMaskU); \n"
3531 #if RISCV64_DEBUG_CALL
3532 "printf(\"uAddr = %#lx\\n\",uAddr); \n"
3535 #if RISCV64_DEBUG_CALL
3536 "printf(\"sAddr = %#lx\\n\",sAddr); \n"
3539 #if RISCV64_DEBUG_CALL
3540 "printf(\"mAddr = %#lx\\n\",mAddr); \n"
3542 "writeMaskM = 3003;\n"
3543 #if RISCV64_DEBUG_CALL
3544 "printf(\"writeMaskM = %#lx\\n\",writeMaskM); \n"
3546 "writeMaskS = 819;\n"
3547 #if RISCV64_DEBUG_CALL
3548 "printf(\"writeMaskS = %#lx\\n\",writeMaskS); \n"
3550 "writeMaskU = 273;\n"
3551 #if RISCV64_DEBUG_CALL
3552 "printf(\"writeMaskU = %#lx\\n\",writeMaskU); \n"
3556 "if(uAddr != sAddr)\n"
3558 "if(((RISCV64*)cpu)->CSR[3088] == 3)\n"
3560 "writeMask = writeMaskM;\n"
3561 #if RISCV64_DEBUG_CALL
3562 "printf(\"writeMask = %#lx\\n\",writeMask); \n"
3566 "if(((RISCV64*)cpu)->CSR[3088] == 1)\n"
3568 "writeMask = writeMaskS;\n"
3569 #if RISCV64_DEBUG_CALL
3570 "printf(\"writeMask = %#lx\\n\",writeMask); \n"
3574 "if(((RISCV64*)cpu)->CSR[3088] == 0)\n"
3576 "writeMask = writeMaskU;\n"
3577 #if RISCV64_DEBUG_CALL
3578 "printf(\"writeMask = %#lx\\n\",writeMask); \n"
3582 "((RISCV64*)cpu)->CSR[uAddr] = ((((RISCV64*)cpu)->CSR[uAddr] & ~writeMask) | ((res & ~(etiss_uint64)" +
toString(zimm) +
") & writeMask))&0xffffffffffffffff&0xffffffffffffffff;\n"
3583 #if RISCV64_DEBUG_CALL
3584 "printf(\"((RISCV64*)cpu)->CSR[uAddr] = %#lx\\n\",((RISCV64*)cpu)->CSR[uAddr]); \n"
3586 "((RISCV64*)cpu)->CSR[sAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n"
3587 #if RISCV64_DEBUG_CALL
3588 "printf(\"((RISCV64*)cpu)->CSR[sAddr] = %#lx\\n\",((RISCV64*)cpu)->CSR[sAddr]); \n"
3590 "((RISCV64*)cpu)->CSR[mAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n"
3591 #if RISCV64_DEBUG_CALL
3592 "printf(\"((RISCV64*)cpu)->CSR[mAddr] = %#lx\\n\",((RISCV64*)cpu)->CSR[mAddr]); \n"
3598 "((RISCV64*)cpu)->CSR[" +
toString(csr) +
"] = (res & ~(etiss_uint64)" +
toString(zimm) +
")&0xffffffffffffffff;\n"
3599 #if RISCV64_DEBUG_CALL
3600 "printf(\"((RISCV64*)cpu)->CSR[" +
toString(csr) +
"] = %#lx\\n\",((RISCV64*)cpu)->CSR[" +
toString(csr) +
"]); \n"
3638 partInit.
code() = std::string(
"//lw\n")+
3639 "etiss_uint32 exception = 0;\n"
3640 "etiss_uint32 temp = 0;\n"
3641 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
3642 #if RISCV64_Pipeline1
3643 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
3644 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
3645 "etiss_uint32 num_stages = 4;\n"
3646 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
3647 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
3649 #if RISCV64_Pipeline2
3650 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
3651 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
3652 "etiss_uint32 num_stages = 4;\n"
3653 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
3654 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
3657 "etiss_int64 offs = 0;\n"
3658 "etiss_int64 imm_extended = 0;\n"
3660 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
3662 "imm_extended = 0;\n"
3663 #if RISCV64_DEBUG_CALL
3664 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
3670 "imm_extended = 4294967295;\n"
3671 #if RISCV64_DEBUG_CALL
3672 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
3674 "imm_extended = (imm_extended << 32);\n"
3675 #if RISCV64_DEBUG_CALL
3676 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
3678 "imm_extended = imm_extended + 4294963200;\n"
3679 #if RISCV64_DEBUG_CALL
3680 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
3683 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
3684 #if RISCV64_DEBUG_CALL
3685 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
3687 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
3688 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
3690 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
3692 "offs = (etiss_int64)cast_0 + imm_extended;\n"
3693 #if RISCV64_DEBUG_CALL
3694 "printf(\"offs = %#lx\\n\",offs); \n"
3698 "etiss_uint32 MEM_offs;\n"
3699 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
3700 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n"
3701 "etiss_int32 cast_1 = MEM_offs; \n"
3702 "if((etiss_int32)((etiss_uint32)cast_1 - 0x80000000) > 0x0)\n"
3704 "cast_1 =0x0 + (etiss_uint32)cast_1 ;\n"
3706 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_1;\n"
3707 #if RISCV64_DEBUG_CALL
3708 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
3715 "return exception;\n"
3749 partInit.
code() = std::string(
"//sw\n")+
3750 "etiss_uint32 exception = 0;\n"
3751 "etiss_uint32 temp = 0;\n"
3752 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
3753 #if RISCV64_Pipeline1
3754 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
3755 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
3756 "etiss_uint32 num_stages = 4;\n"
3757 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
3758 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
3760 #if RISCV64_Pipeline2
3761 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
3762 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
3763 "etiss_uint32 num_stages = 4;\n"
3764 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
3765 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
3768 "etiss_int64 offs = 0;\n"
3769 "etiss_int64 imm_extended = 0;\n"
3771 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
3773 "imm_extended = 0;\n"
3774 #if RISCV64_DEBUG_CALL
3775 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
3781 "imm_extended = 4294967295;\n"
3782 #if RISCV64_DEBUG_CALL
3783 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
3785 "imm_extended = (imm_extended << 32);\n"
3786 #if RISCV64_DEBUG_CALL
3787 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
3789 "imm_extended = imm_extended + 4294963200;\n"
3790 #if RISCV64_DEBUG_CALL
3791 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
3794 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
3795 #if RISCV64_DEBUG_CALL
3796 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
3798 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
3799 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
3801 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
3803 "offs = (etiss_int64)cast_0 + imm_extended;\n"
3804 #if RISCV64_DEBUG_CALL
3805 "printf(\"offs = %#lx\\n\",offs); \n"
3807 "etiss_uint32 MEM_offs;\n"
3808 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
3809 "MEM_offs = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
3810 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n"
3811 #if RISCV64_DEBUG_CALL
3812 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
3814 "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
3816 "((RISCV64*)cpu)->RES = 0;\n"
3817 #if RISCV64_DEBUG_CALL
3818 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
3825 "return exception;\n"
3856 partInit.
code() = std::string(
"//slti\n")+
3857 "etiss_uint32 temp = 0;\n"
3858 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
3859 #if RISCV64_Pipeline1
3860 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
3861 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
3862 "etiss_uint32 num_stages = 4;\n"
3863 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
3864 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
3866 #if RISCV64_Pipeline2
3867 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
3868 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
3869 "etiss_uint32 num_stages = 4;\n"
3870 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
3871 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
3874 "etiss_int64 imm_extended = 0;\n"
3875 "etiss_int8 choose1 = 0;\n"
3877 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
3879 "imm_extended = 0;\n"
3880 #if RISCV64_DEBUG_CALL
3881 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
3887 "imm_extended = 4294967295;\n"
3888 #if RISCV64_DEBUG_CALL
3889 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
3891 "imm_extended = (imm_extended << 32);\n"
3892 #if RISCV64_DEBUG_CALL
3893 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
3895 "imm_extended = imm_extended + 4294963200;\n"
3896 #if RISCV64_DEBUG_CALL
3897 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
3900 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
3901 #if RISCV64_DEBUG_CALL
3902 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
3906 "etiss_int64 cast_0 = imm_extended; \n"
3907 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
3909 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
3911 "etiss_int64 cast_1 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
3912 "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n"
3914 "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n"
3916 "if((etiss_int64)cast_1 < (etiss_int64)cast_0)\n"
3919 #if RISCV64_DEBUG_CALL
3920 "printf(\"choose1 = %#x\\n\",choose1); \n"
3927 #if RISCV64_DEBUG_CALL
3928 "printf(\"choose1 = %#x\\n\",choose1); \n"
3931 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = choose1;\n"
3932 #if RISCV64_DEBUG_CALL
3933 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
3970 partInit.
code() = std::string(
"//csrrs\n")+
3971 "etiss_uint32 temp = 0;\n"
3972 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
3973 #if RISCV64_Pipeline1
3974 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
3975 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
3976 "etiss_uint32 num_stages = 4;\n"
3977 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
3978 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
3980 #if RISCV64_Pipeline2
3981 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
3982 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
3983 "etiss_uint32 num_stages = 4;\n"
3984 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
3985 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
3988 "etiss_uint64 xrs1 = 0;\n"
3989 "etiss_int64 mAddr = 0;\n"
3990 "etiss_int64 writeMask = 0;\n"
3991 "etiss_int64 writeMaskU = 0;\n"
3992 "etiss_int64 sAddr = 0;\n"
3993 "etiss_int64 writeMaskS = 0;\n"
3994 "etiss_int64 uAddr = 0;\n"
3995 "etiss_uint64 xrd = 0;\n"
3996 "etiss_int64 writeMaskM = 0;\n"
3998 "xrd = ((RISCV64*)cpu)->CSR[" +
toString(csr) +
"];\n"
3999 #if RISCV64_DEBUG_CALL
4000 "printf(\"xrd = %#lx\\n\",xrd); \n"
4002 "xrs1 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
4003 #if RISCV64_DEBUG_CALL
4004 "printf(\"xrs1 = %#lx\\n\",xrs1); \n"
4008 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = xrd;\n"
4009 #if RISCV64_DEBUG_CALL
4010 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
4019 #if RISCV64_DEBUG_CALL
4020 "printf(\"uAddr = %#lx\\n\",uAddr); \n"
4023 #if RISCV64_DEBUG_CALL
4024 "printf(\"sAddr = %#lx\\n\",sAddr); \n"
4027 #if RISCV64_DEBUG_CALL
4028 "printf(\"mAddr = %#lx\\n\",mAddr); \n"
4030 "writeMaskM = -9223372036846388805;\n"
4031 #if RISCV64_DEBUG_CALL
4032 "printf(\"writeMaskM = %#lx\\n\",writeMaskM); \n"
4034 "writeMaskS = -9223372036853866189;\n"
4035 #if RISCV64_DEBUG_CALL
4036 "printf(\"writeMaskS = %#lx\\n\",writeMaskS); \n"
4038 "writeMaskU = -9223372036853866479;\n"
4039 #if RISCV64_DEBUG_CALL
4040 "printf(\"writeMaskU = %#lx\\n\",writeMaskU); \n"
4047 #if RISCV64_DEBUG_CALL
4048 "printf(\"uAddr = %#lx\\n\",uAddr); \n"
4051 #if RISCV64_DEBUG_CALL
4052 "printf(\"sAddr = %#lx\\n\",sAddr); \n"
4055 #if RISCV64_DEBUG_CALL
4056 "printf(\"mAddr = %#lx\\n\",mAddr); \n"
4058 "writeMaskM = 3003;\n"
4059 #if RISCV64_DEBUG_CALL
4060 "printf(\"writeMaskM = %#lx\\n\",writeMaskM); \n"
4062 "writeMaskS = 819;\n"
4063 #if RISCV64_DEBUG_CALL
4064 "printf(\"writeMaskS = %#lx\\n\",writeMaskS); \n"
4066 "writeMaskU = 273;\n"
4067 #if RISCV64_DEBUG_CALL
4068 "printf(\"writeMaskU = %#lx\\n\",writeMaskU); \n"
4075 #if RISCV64_DEBUG_CALL
4076 "printf(\"uAddr = %#lx\\n\",uAddr); \n"
4079 #if RISCV64_DEBUG_CALL
4080 "printf(\"sAddr = %#lx\\n\",sAddr); \n"
4083 #if RISCV64_DEBUG_CALL
4084 "printf(\"mAddr = %#lx\\n\",mAddr); \n"
4086 "writeMaskM = 3003;\n"
4087 #if RISCV64_DEBUG_CALL
4088 "printf(\"writeMaskM = %#lx\\n\",writeMaskM); \n"
4090 "writeMaskS = 819;\n"
4091 #if RISCV64_DEBUG_CALL
4092 "printf(\"writeMaskS = %#lx\\n\",writeMaskS); \n"
4094 "writeMaskU = 273;\n"
4095 #if RISCV64_DEBUG_CALL
4096 "printf(\"writeMaskU = %#lx\\n\",writeMaskU); \n"
4100 "if(uAddr != sAddr)\n"
4102 "if(((RISCV64*)cpu)->CSR[3088] == 3)\n"
4104 "writeMask = writeMaskM;\n"
4105 #if RISCV64_DEBUG_CALL
4106 "printf(\"writeMask = %#lx\\n\",writeMask); \n"
4110 "if(((RISCV64*)cpu)->CSR[3088] == 1)\n"
4112 "writeMask = writeMaskS;\n"
4113 #if RISCV64_DEBUG_CALL
4114 "printf(\"writeMask = %#lx\\n\",writeMask); \n"
4118 "if(((RISCV64*)cpu)->CSR[3088] == 0)\n"
4120 "writeMask = writeMaskU;\n"
4121 #if RISCV64_DEBUG_CALL
4122 "printf(\"writeMask = %#lx\\n\",writeMask); \n"
4126 "((RISCV64*)cpu)->CSR[uAddr] = ((((RISCV64*)cpu)->CSR[uAddr] & ~writeMask) | ((xrd | xrs1) & writeMask))&0xffffffffffffffff;\n"
4127 #if RISCV64_DEBUG_CALL
4128 "printf(\"((RISCV64*)cpu)->CSR[uAddr] = %#lx\\n\",((RISCV64*)cpu)->CSR[uAddr]); \n"
4130 "((RISCV64*)cpu)->CSR[sAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n"
4131 #if RISCV64_DEBUG_CALL
4132 "printf(\"((RISCV64*)cpu)->CSR[sAddr] = %#lx\\n\",((RISCV64*)cpu)->CSR[sAddr]); \n"
4134 "((RISCV64*)cpu)->CSR[mAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n"
4135 #if RISCV64_DEBUG_CALL
4136 "printf(\"((RISCV64*)cpu)->CSR[mAddr] = %#lx\\n\",((RISCV64*)cpu)->CSR[mAddr]); \n"
4142 "((RISCV64*)cpu)->CSR[" +
toString(csr) +
"] = (xrd | xrs1);\n"
4143 #if RISCV64_DEBUG_CALL
4144 "printf(\"((RISCV64*)cpu)->CSR[" +
toString(csr) +
"] = %#lx\\n\",((RISCV64*)cpu)->CSR[" +
toString(csr) +
"]); \n"
4182 partInit.
code() = std::string(
"//flw\n")+
4183 "etiss_uint32 exception = 0;\n"
4184 "etiss_uint32 temp = 0;\n"
4185 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
4186 #if RISCV64_Pipeline1
4187 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
4188 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
4189 "etiss_uint32 num_stages = 4;\n"
4190 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
4191 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
4193 #if RISCV64_Pipeline2
4194 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
4195 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
4196 "etiss_uint32 num_stages = 4;\n"
4197 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
4198 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
4201 "etiss_int64 offs = 0;\n"
4202 "etiss_int64 imm_extended = 0;\n"
4203 "etiss_uint32 res = 0;\n"
4204 "etiss_int64 upper = 0;\n"
4206 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
4208 "imm_extended = 0;\n"
4209 #if RISCV64_DEBUG_CALL
4210 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
4216 "imm_extended = 4294967295;\n"
4217 #if RISCV64_DEBUG_CALL
4218 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
4220 "imm_extended = (imm_extended << 32);\n"
4221 #if RISCV64_DEBUG_CALL
4222 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
4224 "imm_extended = imm_extended + 4294963200;\n"
4225 #if RISCV64_DEBUG_CALL
4226 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
4229 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
4230 #if RISCV64_DEBUG_CALL
4231 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
4233 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
4234 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
4236 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
4238 "offs = (etiss_int64)cast_0 + imm_extended;\n"
4239 #if RISCV64_DEBUG_CALL
4240 "printf(\"offs = %#lx\\n\",offs); \n"
4242 "etiss_uint32 MEM_offs;\n"
4243 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
4244 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n"
4246 #if RISCV64_DEBUG_CALL
4247 "printf(\"res = %#x\\n\",res); \n"
4251 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
4252 #if RISCV64_DEBUG_CALL
4253 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
4260 #if RISCV64_DEBUG_CALL
4261 "printf(\"upper = %#lx\\n\",upper); \n"
4263 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 32) | (etiss_uint64)res);\n"
4264 #if RISCV64_DEBUG_CALL
4265 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
4271 "return exception;\n"
4305 partInit.
code() = std::string(
"//fsw\n")+
4306 "etiss_uint32 exception = 0;\n"
4307 "etiss_uint32 temp = 0;\n"
4308 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
4309 #if RISCV64_Pipeline1
4310 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
4311 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
4312 "etiss_uint32 num_stages = 4;\n"
4313 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
4314 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
4316 #if RISCV64_Pipeline2
4317 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
4318 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
4319 "etiss_uint32 num_stages = 4;\n"
4320 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
4321 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
4324 "etiss_int64 offs = 0;\n"
4325 "etiss_int64 imm_extended = 0;\n"
4327 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
4329 "imm_extended = 0;\n"
4330 #if RISCV64_DEBUG_CALL
4331 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
4337 "imm_extended = 4294967295;\n"
4338 #if RISCV64_DEBUG_CALL
4339 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
4341 "imm_extended = (imm_extended << 32);\n"
4342 #if RISCV64_DEBUG_CALL
4343 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
4345 "imm_extended = imm_extended + 4294963200;\n"
4346 #if RISCV64_DEBUG_CALL
4347 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
4350 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
4351 #if RISCV64_DEBUG_CALL
4352 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
4354 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
4355 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
4357 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
4359 "offs = (etiss_int64)cast_0 + imm_extended;\n"
4360 #if RISCV64_DEBUG_CALL
4361 "printf(\"offs = %#lx\\n\",offs); \n"
4363 "etiss_uint32 MEM_offs;\n"
4364 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
4365 "MEM_offs = (((RISCV64*)cpu)->F[" +
toString(rs2) +
"] & 0xffffffff);\n"
4366 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n"
4367 #if RISCV64_DEBUG_CALL
4368 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
4370 "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
4372 "((RISCV64*)cpu)->RES = 0;\n"
4373 #if RISCV64_DEBUG_CALL
4374 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
4381 "return exception;\n"
4412 partInit.
code() = std::string(
"//sltiu\n")+
4413 "etiss_uint32 temp = 0;\n"
4414 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
4415 #if RISCV64_Pipeline1
4416 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
4417 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
4418 "etiss_uint32 num_stages = 4;\n"
4419 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
4420 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
4422 #if RISCV64_Pipeline2
4423 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
4424 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
4425 "etiss_uint32 num_stages = 4;\n"
4426 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
4427 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
4430 "etiss_int64 imm_extended = 0;\n"
4431 "etiss_int64 full_imm = 0;\n"
4432 "etiss_int8 choose1 = 0;\n"
4434 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
4436 "imm_extended = 0;\n"
4437 #if RISCV64_DEBUG_CALL
4438 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
4444 "imm_extended = 4294967295;\n"
4445 #if RISCV64_DEBUG_CALL
4446 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
4448 "imm_extended = (imm_extended << 32);\n"
4449 #if RISCV64_DEBUG_CALL
4450 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
4452 "imm_extended = imm_extended + 4294963200;\n"
4453 #if RISCV64_DEBUG_CALL
4454 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
4457 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
4458 #if RISCV64_DEBUG_CALL
4459 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
4461 "etiss_int64 cast_0 = imm_extended; \n"
4462 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
4464 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
4466 "full_imm = (etiss_int64)cast_0;\n"
4467 #if RISCV64_DEBUG_CALL
4468 "printf(\"full_imm = %#lx\\n\",full_imm); \n"
4472 "if((etiss_uint64)*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] < (etiss_uint64)full_imm)\n"
4475 #if RISCV64_DEBUG_CALL
4476 "printf(\"choose1 = %#x\\n\",choose1); \n"
4483 #if RISCV64_DEBUG_CALL
4484 "printf(\"choose1 = %#x\\n\",choose1); \n"
4487 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = choose1;\n"
4488 #if RISCV64_DEBUG_CALL
4489 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
4526 partInit.
code() = std::string(
"//csrrc\n")+
4527 "etiss_uint32 temp = 0;\n"
4528 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
4529 #if RISCV64_Pipeline1
4530 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
4531 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
4532 "etiss_uint32 num_stages = 4;\n"
4533 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
4534 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
4536 #if RISCV64_Pipeline2
4537 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
4538 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
4539 "etiss_uint32 num_stages = 4;\n"
4540 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
4541 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
4544 "etiss_uint64 xrs1 = 0;\n"
4545 "etiss_int64 mAddr = 0;\n"
4546 "etiss_int64 writeMask = 0;\n"
4547 "etiss_int64 writeMaskU = 0;\n"
4548 "etiss_int64 sAddr = 0;\n"
4549 "etiss_int64 writeMaskS = 0;\n"
4550 "etiss_int64 uAddr = 0;\n"
4551 "etiss_uint64 xrd = 0;\n"
4552 "etiss_int64 writeMaskM = 0;\n"
4554 "xrd = ((RISCV64*)cpu)->CSR[" +
toString(csr) +
"];\n"
4555 #if RISCV64_DEBUG_CALL
4556 "printf(\"xrd = %#lx\\n\",xrd); \n"
4558 "xrs1 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
4559 #if RISCV64_DEBUG_CALL
4560 "printf(\"xrs1 = %#lx\\n\",xrs1); \n"
4564 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = xrd;\n"
4565 #if RISCV64_DEBUG_CALL
4566 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
4575 #if RISCV64_DEBUG_CALL
4576 "printf(\"uAddr = %#lx\\n\",uAddr); \n"
4579 #if RISCV64_DEBUG_CALL
4580 "printf(\"sAddr = %#lx\\n\",sAddr); \n"
4583 #if RISCV64_DEBUG_CALL
4584 "printf(\"mAddr = %#lx\\n\",mAddr); \n"
4586 "writeMaskM = -9223372036846388805;\n"
4587 #if RISCV64_DEBUG_CALL
4588 "printf(\"writeMaskM = %#lx\\n\",writeMaskM); \n"
4590 "writeMaskS = -9223372036853866189;\n"
4591 #if RISCV64_DEBUG_CALL
4592 "printf(\"writeMaskS = %#lx\\n\",writeMaskS); \n"
4594 "writeMaskU = -9223372036853866479;\n"
4595 #if RISCV64_DEBUG_CALL
4596 "printf(\"writeMaskU = %#lx\\n\",writeMaskU); \n"
4603 #if RISCV64_DEBUG_CALL
4604 "printf(\"uAddr = %#lx\\n\",uAddr); \n"
4607 #if RISCV64_DEBUG_CALL
4608 "printf(\"sAddr = %#lx\\n\",sAddr); \n"
4611 #if RISCV64_DEBUG_CALL
4612 "printf(\"mAddr = %#lx\\n\",mAddr); \n"
4614 "writeMaskM = 3003;\n"
4615 #if RISCV64_DEBUG_CALL
4616 "printf(\"writeMaskM = %#lx\\n\",writeMaskM); \n"
4618 "writeMaskS = 819;\n"
4619 #if RISCV64_DEBUG_CALL
4620 "printf(\"writeMaskS = %#lx\\n\",writeMaskS); \n"
4622 "writeMaskU = 273;\n"
4623 #if RISCV64_DEBUG_CALL
4624 "printf(\"writeMaskU = %#lx\\n\",writeMaskU); \n"
4631 #if RISCV64_DEBUG_CALL
4632 "printf(\"uAddr = %#lx\\n\",uAddr); \n"
4635 #if RISCV64_DEBUG_CALL
4636 "printf(\"sAddr = %#lx\\n\",sAddr); \n"
4639 #if RISCV64_DEBUG_CALL
4640 "printf(\"mAddr = %#lx\\n\",mAddr); \n"
4642 "writeMaskM = 3003;\n"
4643 #if RISCV64_DEBUG_CALL
4644 "printf(\"writeMaskM = %#lx\\n\",writeMaskM); \n"
4646 "writeMaskS = 819;\n"
4647 #if RISCV64_DEBUG_CALL
4648 "printf(\"writeMaskS = %#lx\\n\",writeMaskS); \n"
4650 "writeMaskU = 273;\n"
4651 #if RISCV64_DEBUG_CALL
4652 "printf(\"writeMaskU = %#lx\\n\",writeMaskU); \n"
4656 "if(uAddr != sAddr)\n"
4658 "if(((RISCV64*)cpu)->CSR[3088] == 3)\n"
4660 "writeMask = writeMaskM;\n"
4661 #if RISCV64_DEBUG_CALL
4662 "printf(\"writeMask = %#lx\\n\",writeMask); \n"
4666 "if(((RISCV64*)cpu)->CSR[3088] == 1)\n"
4668 "writeMask = writeMaskS;\n"
4669 #if RISCV64_DEBUG_CALL
4670 "printf(\"writeMask = %#lx\\n\",writeMask); \n"
4674 "if(((RISCV64*)cpu)->CSR[3088] == 0)\n"
4676 "writeMask = writeMaskU;\n"
4677 #if RISCV64_DEBUG_CALL
4678 "printf(\"writeMask = %#lx\\n\",writeMask); \n"
4682 "((RISCV64*)cpu)->CSR[uAddr] = ((((RISCV64*)cpu)->CSR[uAddr] & ~writeMask) | ((xrd & ~xrs1) & writeMask))&0xffffffffffffffff&0xffffffffffffffff;\n"
4683 #if RISCV64_DEBUG_CALL
4684 "printf(\"((RISCV64*)cpu)->CSR[uAddr] = %#lx\\n\",((RISCV64*)cpu)->CSR[uAddr]); \n"
4686 "((RISCV64*)cpu)->CSR[sAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n"
4687 #if RISCV64_DEBUG_CALL
4688 "printf(\"((RISCV64*)cpu)->CSR[sAddr] = %#lx\\n\",((RISCV64*)cpu)->CSR[sAddr]); \n"
4690 "((RISCV64*)cpu)->CSR[mAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n"
4691 #if RISCV64_DEBUG_CALL
4692 "printf(\"((RISCV64*)cpu)->CSR[mAddr] = %#lx\\n\",((RISCV64*)cpu)->CSR[mAddr]); \n"
4698 "((RISCV64*)cpu)->CSR[" +
toString(csr) +
"] = (xrd & ~xrs1)&0xffffffffffffffff;\n"
4699 #if RISCV64_DEBUG_CALL
4700 "printf(\"((RISCV64*)cpu)->CSR[" +
toString(csr) +
"] = %#lx\\n\",((RISCV64*)cpu)->CSR[" +
toString(csr) +
"]); \n"
4738 partInit.
code() = std::string(
"//ld\n")+
4739 "etiss_uint32 exception = 0;\n"
4740 "etiss_uint32 temp = 0;\n"
4741 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
4742 #if RISCV64_Pipeline1
4743 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
4744 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
4745 "etiss_uint32 num_stages = 4;\n"
4746 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
4747 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
4749 #if RISCV64_Pipeline2
4750 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
4751 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
4752 "etiss_uint32 num_stages = 4;\n"
4753 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
4754 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
4757 "etiss_int64 offs = 0;\n"
4758 "etiss_int64 imm_extended = 0;\n"
4760 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
4762 "imm_extended = 0;\n"
4763 #if RISCV64_DEBUG_CALL
4764 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
4770 "imm_extended = 4294967295;\n"
4771 #if RISCV64_DEBUG_CALL
4772 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
4774 "imm_extended = (imm_extended << 32);\n"
4775 #if RISCV64_DEBUG_CALL
4776 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
4778 "imm_extended = imm_extended + 4294963200;\n"
4779 #if RISCV64_DEBUG_CALL
4780 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
4783 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
4784 #if RISCV64_DEBUG_CALL
4785 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
4787 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
4788 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
4790 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
4792 "offs = (etiss_int64)cast_0 + imm_extended;\n"
4793 #if RISCV64_DEBUG_CALL
4794 "printf(\"offs = %#lx\\n\",offs); \n"
4798 "etiss_uint64 MEM_offs;\n"
4799 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
4800 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n"
4801 "etiss_int64 cast_1 = MEM_offs; \n"
4802 "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n"
4804 "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n"
4806 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_1;\n"
4807 #if RISCV64_DEBUG_CALL
4808 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
4815 "return exception;\n"
4849 partInit.
code() = std::string(
"//sd\n")+
4850 "etiss_uint32 exception = 0;\n"
4851 "etiss_uint32 temp = 0;\n"
4852 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
4853 #if RISCV64_Pipeline1
4854 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
4855 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
4856 "etiss_uint32 num_stages = 4;\n"
4857 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
4858 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
4860 #if RISCV64_Pipeline2
4861 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
4862 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
4863 "etiss_uint32 num_stages = 4;\n"
4864 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
4865 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
4868 "etiss_int64 offs = 0;\n"
4869 "etiss_int64 imm_extended = 0;\n"
4871 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
4873 "imm_extended = 0;\n"
4874 #if RISCV64_DEBUG_CALL
4875 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
4881 "imm_extended = 4294967295;\n"
4882 #if RISCV64_DEBUG_CALL
4883 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
4885 "imm_extended = (imm_extended << 32);\n"
4886 #if RISCV64_DEBUG_CALL
4887 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
4889 "imm_extended = imm_extended + 4294963200;\n"
4890 #if RISCV64_DEBUG_CALL
4891 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
4894 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
4895 #if RISCV64_DEBUG_CALL
4896 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
4898 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
4899 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
4901 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
4903 "offs = (etiss_int64)cast_0 + imm_extended;\n"
4904 #if RISCV64_DEBUG_CALL
4905 "printf(\"offs = %#lx\\n\",offs); \n"
4907 "etiss_uint64 MEM_offs;\n"
4908 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
4909 "MEM_offs = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
4910 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n"
4911 #if RISCV64_DEBUG_CALL
4912 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
4914 "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
4916 "((RISCV64*)cpu)->RES = 0;\n"
4917 #if RISCV64_DEBUG_CALL
4918 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
4925 "return exception;\n"
4956 partInit.
code() = std::string(
"//fld\n")+
4957 "etiss_uint32 exception = 0;\n"
4958 "etiss_uint32 temp = 0;\n"
4959 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
4960 #if RISCV64_Pipeline1
4961 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
4962 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
4963 "etiss_uint32 num_stages = 4;\n"
4964 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
4965 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
4967 #if RISCV64_Pipeline2
4968 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
4969 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
4970 "etiss_uint32 num_stages = 4;\n"
4971 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
4972 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
4975 "etiss_int64 offs = 0;\n"
4976 "etiss_int64 imm_extended = 0;\n"
4977 "etiss_uint64 res = 0;\n"
4978 "etiss_int64 upper = 0;\n"
4980 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
4982 "imm_extended = 0;\n"
4983 #if RISCV64_DEBUG_CALL
4984 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
4990 "imm_extended = 4294967295;\n"
4991 #if RISCV64_DEBUG_CALL
4992 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
4994 "imm_extended = (imm_extended << 32);\n"
4995 #if RISCV64_DEBUG_CALL
4996 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
4998 "imm_extended = imm_extended + 4294963200;\n"
4999 #if RISCV64_DEBUG_CALL
5000 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
5003 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
5004 #if RISCV64_DEBUG_CALL
5005 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
5007 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
5008 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
5010 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
5012 "offs = (etiss_int64)cast_0 + imm_extended;\n"
5013 #if RISCV64_DEBUG_CALL
5014 "printf(\"offs = %#lx\\n\",offs); \n"
5016 "etiss_uint64 MEM_offs;\n"
5017 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
5018 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n"
5020 #if RISCV64_DEBUG_CALL
5021 "printf(\"res = %#lx\\n\",res); \n"
5025 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
5026 #if RISCV64_DEBUG_CALL
5027 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
5034 #if RISCV64_DEBUG_CALL
5035 "printf(\"upper = %#lx\\n\",upper); \n"
5037 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 64) | res);\n"
5038 #if RISCV64_DEBUG_CALL
5039 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
5045 "return exception;\n"
5079 partInit.
code() = std::string(
"//fsd\n")+
5080 "etiss_uint32 exception = 0;\n"
5081 "etiss_uint32 temp = 0;\n"
5082 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
5083 #if RISCV64_Pipeline1
5084 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
5085 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
5086 "etiss_uint32 num_stages = 4;\n"
5087 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
5088 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
5090 #if RISCV64_Pipeline2
5091 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
5092 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
5093 "etiss_uint32 num_stages = 4;\n"
5094 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
5095 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
5098 "etiss_int64 offs = 0;\n"
5099 "etiss_int64 imm_extended = 0;\n"
5101 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
5103 "imm_extended = 0;\n"
5104 #if RISCV64_DEBUG_CALL
5105 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
5111 "imm_extended = 4294967295;\n"
5112 #if RISCV64_DEBUG_CALL
5113 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
5115 "imm_extended = (imm_extended << 32);\n"
5116 #if RISCV64_DEBUG_CALL
5117 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
5119 "imm_extended = imm_extended + 4294963200;\n"
5120 #if RISCV64_DEBUG_CALL
5121 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
5124 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
5125 #if RISCV64_DEBUG_CALL
5126 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
5128 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
5129 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
5131 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
5133 "offs = (etiss_int64)cast_0 + imm_extended;\n"
5134 #if RISCV64_DEBUG_CALL
5135 "printf(\"offs = %#lx\\n\",offs); \n"
5137 "etiss_uint64 MEM_offs;\n"
5138 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
5139 "MEM_offs = (((RISCV64*)cpu)->F[" +
toString(rs2) +
"] & 0xffffffffffffffff);\n"
5140 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n"
5141 #if RISCV64_DEBUG_CALL
5142 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
5144 "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
5146 "((RISCV64*)cpu)->RES = 0;\n"
5147 #if RISCV64_DEBUG_CALL
5148 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
5155 "return exception;\n"
5193 partInit.
code() = std::string(
"//fmadd.s\n")+
5194 "etiss_uint32 temp = 0;\n"
5195 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
5196 #if RISCV64_Pipeline1
5197 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
5198 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
5199 "etiss_uint32 num_stages = 4;\n"
5200 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
5201 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
5203 #if RISCV64_Pipeline2
5204 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
5205 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
5206 "etiss_uint32 num_stages = 4;\n"
5207 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
5208 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
5211 "etiss_uint32 res = 0;\n"
5212 "etiss_int64 upper = 0;\n"
5213 "etiss_uint32 flags = 0;\n"
5214 "etiss_uint32 frs1 = 0;\n"
5215 "etiss_uint32 choose1 = 0;\n"
5216 "etiss_uint32 frs2 = 0;\n"
5217 "etiss_uint32 frs3 = 0;\n"
5223 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
5224 #if RISCV64_DEBUG_CALL
5225 "printf(\"choose1 = %#x\\n\",choose1); \n"
5231 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
5232 #if RISCV64_DEBUG_CALL
5233 "printf(\"choose1 = %#x\\n\",choose1); \n"
5236 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = fmadd_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"], ((RISCV64*)cpu)->F[" +
toString(rs2) +
"], ((RISCV64*)cpu)->F[" +
toString(rs3) +
"], (etiss_uint32)0, choose1);\n"
5237 #if RISCV64_DEBUG_CALL
5238 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
5244 "frs1 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"]);\n"
5245 #if RISCV64_DEBUG_CALL
5246 "printf(\"frs1 = %#x\\n\",frs1); \n"
5248 "frs2 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs2) +
"]);\n"
5249 #if RISCV64_DEBUG_CALL
5250 "printf(\"frs2 = %#x\\n\",frs2); \n"
5252 "frs3 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs3) +
"]);\n"
5253 #if RISCV64_DEBUG_CALL
5254 "printf(\"frs3 = %#x\\n\",frs3); \n"
5258 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
5259 #if RISCV64_DEBUG_CALL
5260 "printf(\"choose1 = %#x\\n\",choose1); \n"
5266 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
5267 #if RISCV64_DEBUG_CALL
5268 "printf(\"choose1 = %#x\\n\",choose1); \n"
5271 "res = fmadd_s(frs1, frs2, frs3, (etiss_uint32)0, choose1);\n"
5272 #if RISCV64_DEBUG_CALL
5273 "printf(\"res = %#x\\n\",res); \n"
5276 #if RISCV64_DEBUG_CALL
5277 "printf(\"upper = %#lx\\n\",upper); \n"
5279 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 32) | (etiss_uint64)res);\n"
5280 #if RISCV64_DEBUG_CALL
5281 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
5284 "flags = fget_flags();\n"
5285 #if RISCV64_DEBUG_CALL
5286 "printf(\"flags = %#x\\n\",flags); \n"
5288 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
5289 #if RISCV64_DEBUG_CALL
5290 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
5332 partInit.
code() = std::string(
"//fmsub.s\n")+
5333 "etiss_uint32 temp = 0;\n"
5334 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
5335 #if RISCV64_Pipeline1
5336 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
5337 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
5338 "etiss_uint32 num_stages = 4;\n"
5339 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
5340 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
5342 #if RISCV64_Pipeline2
5343 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
5344 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
5345 "etiss_uint32 num_stages = 4;\n"
5346 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
5347 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
5350 "etiss_uint32 res = 0;\n"
5351 "etiss_int64 upper = 0;\n"
5352 "etiss_uint32 flags = 0;\n"
5353 "etiss_uint32 frs1 = 0;\n"
5354 "etiss_uint32 choose1 = 0;\n"
5355 "etiss_uint32 frs2 = 0;\n"
5356 "etiss_uint32 frs3 = 0;\n"
5362 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
5363 #if RISCV64_DEBUG_CALL
5364 "printf(\"choose1 = %#x\\n\",choose1); \n"
5370 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
5371 #if RISCV64_DEBUG_CALL
5372 "printf(\"choose1 = %#x\\n\",choose1); \n"
5375 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = fmadd_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"], ((RISCV64*)cpu)->F[" +
toString(rs2) +
"], ((RISCV64*)cpu)->F[" +
toString(rs3) +
"], (etiss_uint32)1, choose1);\n"
5376 #if RISCV64_DEBUG_CALL
5377 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
5383 "frs1 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"]);\n"
5384 #if RISCV64_DEBUG_CALL
5385 "printf(\"frs1 = %#x\\n\",frs1); \n"
5387 "frs2 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs2) +
"]);\n"
5388 #if RISCV64_DEBUG_CALL
5389 "printf(\"frs2 = %#x\\n\",frs2); \n"
5391 "frs3 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs3) +
"]);\n"
5392 #if RISCV64_DEBUG_CALL
5393 "printf(\"frs3 = %#x\\n\",frs3); \n"
5397 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
5398 #if RISCV64_DEBUG_CALL
5399 "printf(\"choose1 = %#x\\n\",choose1); \n"
5405 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
5406 #if RISCV64_DEBUG_CALL
5407 "printf(\"choose1 = %#x\\n\",choose1); \n"
5410 "res = fmadd_s(frs1, frs2, frs3, (etiss_uint32)1, choose1);\n"
5411 #if RISCV64_DEBUG_CALL
5412 "printf(\"res = %#x\\n\",res); \n"
5415 #if RISCV64_DEBUG_CALL
5416 "printf(\"upper = %#lx\\n\",upper); \n"
5418 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 32) | (etiss_uint64)res);\n"
5419 #if RISCV64_DEBUG_CALL
5420 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
5423 "flags = fget_flags();\n"
5424 #if RISCV64_DEBUG_CALL
5425 "printf(\"flags = %#x\\n\",flags); \n"
5427 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
5428 #if RISCV64_DEBUG_CALL
5429 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
5471 partInit.
code() = std::string(
"//fnmadd.s\n")+
5472 "etiss_uint32 temp = 0;\n"
5473 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
5474 #if RISCV64_Pipeline1
5475 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
5476 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
5477 "etiss_uint32 num_stages = 4;\n"
5478 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
5479 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
5481 #if RISCV64_Pipeline2
5482 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
5483 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
5484 "etiss_uint32 num_stages = 4;\n"
5485 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
5486 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
5489 "etiss_uint32 res = 0;\n"
5490 "etiss_int64 upper = 0;\n"
5491 "etiss_uint32 flags = 0;\n"
5492 "etiss_uint32 frs1 = 0;\n"
5493 "etiss_uint32 choose1 = 0;\n"
5494 "etiss_uint32 frs2 = 0;\n"
5495 "etiss_uint32 frs3 = 0;\n"
5501 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
5502 #if RISCV64_DEBUG_CALL
5503 "printf(\"choose1 = %#x\\n\",choose1); \n"
5509 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
5510 #if RISCV64_DEBUG_CALL
5511 "printf(\"choose1 = %#x\\n\",choose1); \n"
5514 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = fmadd_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"], ((RISCV64*)cpu)->F[" +
toString(rs2) +
"], ((RISCV64*)cpu)->F[" +
toString(rs3) +
"], (etiss_uint32)2, choose1);\n"
5515 #if RISCV64_DEBUG_CALL
5516 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
5522 "frs1 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"]);\n"
5523 #if RISCV64_DEBUG_CALL
5524 "printf(\"frs1 = %#x\\n\",frs1); \n"
5526 "frs2 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs2) +
"]);\n"
5527 #if RISCV64_DEBUG_CALL
5528 "printf(\"frs2 = %#x\\n\",frs2); \n"
5530 "frs3 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs3) +
"]);\n"
5531 #if RISCV64_DEBUG_CALL
5532 "printf(\"frs3 = %#x\\n\",frs3); \n"
5536 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
5537 #if RISCV64_DEBUG_CALL
5538 "printf(\"choose1 = %#x\\n\",choose1); \n"
5544 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
5545 #if RISCV64_DEBUG_CALL
5546 "printf(\"choose1 = %#x\\n\",choose1); \n"
5549 "res = fmadd_s(frs1, frs2, frs3, (etiss_uint32)2, choose1);\n"
5550 #if RISCV64_DEBUG_CALL
5551 "printf(\"res = %#x\\n\",res); \n"
5554 #if RISCV64_DEBUG_CALL
5555 "printf(\"upper = %#lx\\n\",upper); \n"
5557 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 32) | (etiss_uint64)res);\n"
5558 #if RISCV64_DEBUG_CALL
5559 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
5562 "flags = fget_flags();\n"
5563 #if RISCV64_DEBUG_CALL
5564 "printf(\"flags = %#x\\n\",flags); \n"
5566 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
5567 #if RISCV64_DEBUG_CALL
5568 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
5610 partInit.
code() = std::string(
"//fnmsub.s\n")+
5611 "etiss_uint32 temp = 0;\n"
5612 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
5613 #if RISCV64_Pipeline1
5614 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
5615 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
5616 "etiss_uint32 num_stages = 4;\n"
5617 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
5618 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
5620 #if RISCV64_Pipeline2
5621 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
5622 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
5623 "etiss_uint32 num_stages = 4;\n"
5624 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
5625 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
5628 "etiss_uint32 res = 0;\n"
5629 "etiss_int64 upper = 0;\n"
5630 "etiss_uint32 flags = 0;\n"
5631 "etiss_uint32 frs1 = 0;\n"
5632 "etiss_uint32 choose1 = 0;\n"
5633 "etiss_uint32 frs2 = 0;\n"
5634 "etiss_uint32 frs3 = 0;\n"
5640 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
5641 #if RISCV64_DEBUG_CALL
5642 "printf(\"choose1 = %#x\\n\",choose1); \n"
5648 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
5649 #if RISCV64_DEBUG_CALL
5650 "printf(\"choose1 = %#x\\n\",choose1); \n"
5653 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = fmadd_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"], ((RISCV64*)cpu)->F[" +
toString(rs2) +
"], ((RISCV64*)cpu)->F[" +
toString(rs3) +
"], (etiss_uint32)3, choose1);\n"
5654 #if RISCV64_DEBUG_CALL
5655 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
5661 "frs1 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"]);\n"
5662 #if RISCV64_DEBUG_CALL
5663 "printf(\"frs1 = %#x\\n\",frs1); \n"
5665 "frs2 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs2) +
"]);\n"
5666 #if RISCV64_DEBUG_CALL
5667 "printf(\"frs2 = %#x\\n\",frs2); \n"
5669 "frs3 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs3) +
"]);\n"
5670 #if RISCV64_DEBUG_CALL
5671 "printf(\"frs3 = %#x\\n\",frs3); \n"
5675 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
5676 #if RISCV64_DEBUG_CALL
5677 "printf(\"choose1 = %#x\\n\",choose1); \n"
5683 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
5684 #if RISCV64_DEBUG_CALL
5685 "printf(\"choose1 = %#x\\n\",choose1); \n"
5688 "res = fmadd_s(frs1, frs2, frs3, (etiss_uint32)3, choose1);\n"
5689 #if RISCV64_DEBUG_CALL
5690 "printf(\"res = %#x\\n\",res); \n"
5693 #if RISCV64_DEBUG_CALL
5694 "printf(\"upper = %#lx\\n\",upper); \n"
5696 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 32) | (etiss_uint64)res);\n"
5697 #if RISCV64_DEBUG_CALL
5698 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
5701 "flags = fget_flags();\n"
5702 #if RISCV64_DEBUG_CALL
5703 "printf(\"flags = %#x\\n\",flags); \n"
5705 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
5706 #if RISCV64_DEBUG_CALL
5707 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
5749 partInit.
code() = std::string(
"//fmadd.d\n")+
5750 "etiss_uint32 temp = 0;\n"
5751 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
5752 #if RISCV64_Pipeline1
5753 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
5754 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
5755 "etiss_uint32 num_stages = 4;\n"
5756 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
5757 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
5759 #if RISCV64_Pipeline2
5760 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
5761 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
5762 "etiss_uint32 num_stages = 4;\n"
5763 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
5764 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
5767 "etiss_uint64 res = 0;\n"
5768 "etiss_int64 upper = 0;\n"
5769 "etiss_uint32 flags = 0;\n"
5770 "etiss_uint32 choose1 = 0;\n"
5774 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
5775 #if RISCV64_DEBUG_CALL
5776 "printf(\"choose1 = %#x\\n\",choose1); \n"
5782 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
5783 #if RISCV64_DEBUG_CALL
5784 "printf(\"choose1 = %#x\\n\",choose1); \n"
5787 "res = fmadd_d((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F[" +
toString(rs2) +
"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F[" +
toString(rs3) +
"] & 0xffffffffffffffff), (etiss_uint64)0, choose1);\n"
5788 #if RISCV64_DEBUG_CALL
5789 "printf(\"res = %#lx\\n\",res); \n"
5793 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
5794 #if RISCV64_DEBUG_CALL
5795 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
5802 #if RISCV64_DEBUG_CALL
5803 "printf(\"upper = %#lx\\n\",upper); \n"
5805 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 64) | res);\n"
5806 #if RISCV64_DEBUG_CALL
5807 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
5810 "flags = fget_flags();\n"
5811 #if RISCV64_DEBUG_CALL
5812 "printf(\"flags = %#x\\n\",flags); \n"
5814 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
5815 #if RISCV64_DEBUG_CALL
5816 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
5858 partInit.
code() = std::string(
"//fmsub.d\n")+
5859 "etiss_uint32 temp = 0;\n"
5860 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
5861 #if RISCV64_Pipeline1
5862 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
5863 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
5864 "etiss_uint32 num_stages = 4;\n"
5865 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
5866 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
5868 #if RISCV64_Pipeline2
5869 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
5870 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
5871 "etiss_uint32 num_stages = 4;\n"
5872 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
5873 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
5876 "etiss_uint64 res = 0;\n"
5877 "etiss_int64 upper = 0;\n"
5878 "etiss_uint32 flags = 0;\n"
5879 "etiss_uint32 choose1 = 0;\n"
5883 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
5884 #if RISCV64_DEBUG_CALL
5885 "printf(\"choose1 = %#x\\n\",choose1); \n"
5891 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
5892 #if RISCV64_DEBUG_CALL
5893 "printf(\"choose1 = %#x\\n\",choose1); \n"
5896 "res = fmadd_d((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F[" +
toString(rs2) +
"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F[" +
toString(rs3) +
"] & 0xffffffffffffffff), (etiss_uint32)1, choose1);\n"
5897 #if RISCV64_DEBUG_CALL
5898 "printf(\"res = %#lx\\n\",res); \n"
5902 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
5903 #if RISCV64_DEBUG_CALL
5904 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
5911 #if RISCV64_DEBUG_CALL
5912 "printf(\"upper = %#lx\\n\",upper); \n"
5914 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 64) | res);\n"
5915 #if RISCV64_DEBUG_CALL
5916 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
5919 "flags = fget_flags();\n"
5920 #if RISCV64_DEBUG_CALL
5921 "printf(\"flags = %#x\\n\",flags); \n"
5923 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
5924 #if RISCV64_DEBUG_CALL
5925 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
5967 partInit.
code() = std::string(
"//fnmadd.d\n")+
5968 "etiss_uint32 temp = 0;\n"
5969 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
5970 #if RISCV64_Pipeline1
5971 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
5972 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
5973 "etiss_uint32 num_stages = 4;\n"
5974 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
5975 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
5977 #if RISCV64_Pipeline2
5978 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
5979 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
5980 "etiss_uint32 num_stages = 4;\n"
5981 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
5982 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
5985 "etiss_uint64 res = 0;\n"
5986 "etiss_int64 upper = 0;\n"
5987 "etiss_uint32 flags = 0;\n"
5988 "etiss_uint32 choose1 = 0;\n"
5992 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
5993 #if RISCV64_DEBUG_CALL
5994 "printf(\"choose1 = %#x\\n\",choose1); \n"
6000 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
6001 #if RISCV64_DEBUG_CALL
6002 "printf(\"choose1 = %#x\\n\",choose1); \n"
6005 "res = fmadd_d((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F[" +
toString(rs2) +
"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F[" +
toString(rs3) +
"] & 0xffffffffffffffff), (etiss_uint32)2, choose1);\n"
6006 #if RISCV64_DEBUG_CALL
6007 "printf(\"res = %#lx\\n\",res); \n"
6011 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
6012 #if RISCV64_DEBUG_CALL
6013 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
6020 #if RISCV64_DEBUG_CALL
6021 "printf(\"upper = %#lx\\n\",upper); \n"
6023 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 64) | res);\n"
6024 #if RISCV64_DEBUG_CALL
6025 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
6028 "flags = fget_flags();\n"
6029 #if RISCV64_DEBUG_CALL
6030 "printf(\"flags = %#x\\n\",flags); \n"
6032 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
6033 #if RISCV64_DEBUG_CALL
6034 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
6076 partInit.
code() = std::string(
"//fnmsub.d\n")+
6077 "etiss_uint32 temp = 0;\n"
6078 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
6079 #if RISCV64_Pipeline1
6080 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6081 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6082 "etiss_uint32 num_stages = 4;\n"
6083 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6084 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6086 #if RISCV64_Pipeline2
6087 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6088 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6089 "etiss_uint32 num_stages = 4;\n"
6090 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6091 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6094 "etiss_uint64 res = 0;\n"
6095 "etiss_int64 upper = 0;\n"
6096 "etiss_uint32 flags = 0;\n"
6097 "etiss_uint32 choose1 = 0;\n"
6101 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
6102 #if RISCV64_DEBUG_CALL
6103 "printf(\"choose1 = %#x\\n\",choose1); \n"
6109 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
6110 #if RISCV64_DEBUG_CALL
6111 "printf(\"choose1 = %#x\\n\",choose1); \n"
6114 "res = fmadd_d((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F[" +
toString(rs2) +
"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F[" +
toString(rs3) +
"] & 0xffffffffffffffff), (etiss_uint32)3, choose1);\n"
6115 #if RISCV64_DEBUG_CALL
6116 "printf(\"res = %#lx\\n\",res); \n"
6120 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
6121 #if RISCV64_DEBUG_CALL
6122 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
6129 #if RISCV64_DEBUG_CALL
6130 "printf(\"upper = %#lx\\n\",upper); \n"
6132 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 64) | res);\n"
6133 #if RISCV64_DEBUG_CALL
6134 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
6137 "flags = fget_flags();\n"
6138 #if RISCV64_DEBUG_CALL
6139 "printf(\"flags = %#x\\n\",flags); \n"
6141 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
6142 #if RISCV64_DEBUG_CALL
6143 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
6178 partInit.
code() = std::string(
"//slli\n")+
6179 "etiss_uint32 temp = 0;\n"
6180 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
6181 #if RISCV64_Pipeline1
6182 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6183 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6184 "etiss_uint32 num_stages = 4;\n"
6185 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6186 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6188 #if RISCV64_Pipeline2
6189 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6190 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6191 "etiss_uint32 num_stages = 4;\n"
6192 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6193 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6200 #if RISCV64_DEBUG_CALL
6201 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
6238 partInit.
code() = std::string(
"//srli\n")+
6239 "etiss_uint32 temp = 0;\n"
6240 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
6241 #if RISCV64_Pipeline1
6242 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6243 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6244 "etiss_uint32 num_stages = 4;\n"
6245 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6246 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6248 #if RISCV64_Pipeline2
6249 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6250 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6251 "etiss_uint32 num_stages = 4;\n"
6252 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6253 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6260 #if RISCV64_DEBUG_CALL
6261 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
6298 partInit.
code() = std::string(
"//srai\n")+
6299 "etiss_uint32 temp = 0;\n"
6300 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
6301 #if RISCV64_Pipeline1
6302 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6303 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6304 "etiss_uint32 num_stages = 4;\n"
6305 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6306 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6308 #if RISCV64_Pipeline2
6309 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6310 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6311 "etiss_uint32 num_stages = 4;\n"
6312 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6313 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6319 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
6320 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
6322 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
6324 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = ((etiss_int64)cast_0 >> " +
toString(shamt) +
");\n"
6325 #if RISCV64_DEBUG_CALL
6326 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
6364 partInit.
code() = std::string(
"//add\n")+
6365 "etiss_uint32 temp = 0;\n"
6366 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
6367 #if RISCV64_Pipeline1
6368 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6369 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6370 "etiss_uint32 num_stages = 4;\n"
6371 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6372 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6374 #if RISCV64_Pipeline2
6375 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6376 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6377 "etiss_uint32 num_stages = 4;\n"
6378 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6379 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6385 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"] + *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
6386 #if RISCV64_DEBUG_CALL
6387 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
6425 partInit.
code() = std::string(
"//addw\n")+
6426 "etiss_uint32 temp = 0;\n"
6427 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
6428 #if RISCV64_Pipeline1
6429 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6430 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6431 "etiss_uint32 num_stages = 4;\n"
6432 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6433 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6435 #if RISCV64_Pipeline2
6436 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6437 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6438 "etiss_uint32 num_stages = 4;\n"
6439 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6440 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6443 "etiss_uint32 res = 0;\n"
6447 "res = (*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff) + (*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] & 0xffffffff);\n"
6448 #if RISCV64_DEBUG_CALL
6449 "printf(\"res = %#x\\n\",res); \n"
6451 "etiss_int32 cast_0 = res; \n"
6452 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
6454 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
6456 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
6457 #if RISCV64_DEBUG_CALL
6458 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
6496 partInit.
code() = std::string(
"//sll\n")+
6497 "etiss_uint32 temp = 0;\n"
6498 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
6499 #if RISCV64_Pipeline1
6500 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6501 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {4, 5}, {6, 7}};\n"
6502 "etiss_uint32 num_stages = 4;\n"
6503 "etiss_uint32 num_resources[100] = {2, 1, 2, 2};\n"
6504 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6506 #if RISCV64_Pipeline2
6507 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6508 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {4, 5}, {6, 7}};\n"
6509 "etiss_uint32 num_stages = 4;\n"
6510 "etiss_uint32 num_resources[100] = {2, 1, 2, 2};\n"
6511 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6517 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] << (*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] & 64 - 1));\n"
6518 #if RISCV64_DEBUG_CALL
6519 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
6556 partInit.
code() = std::string(
"//slliw\n")+
6557 "etiss_uint32 temp = 0;\n"
6558 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
6559 #if RISCV64_Pipeline1
6560 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6561 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6562 "etiss_uint32 num_stages = 4;\n"
6563 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6564 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6566 #if RISCV64_Pipeline2
6567 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6568 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6569 "etiss_uint32 num_stages = 4;\n"
6570 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6571 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6574 "etiss_uint32 sh_val = 0;\n"
6578 "sh_val = ((*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff) << " +
toString(shamt) +
");\n"
6579 #if RISCV64_DEBUG_CALL
6580 "printf(\"sh_val = %#x\\n\",sh_val); \n"
6582 "etiss_int32 cast_0 = sh_val; \n"
6583 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
6585 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
6587 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
6588 #if RISCV64_DEBUG_CALL
6589 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
6627 partInit.
code() = std::string(
"//sllw\n")+
6628 "etiss_uint32 temp = 0;\n"
6629 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
6630 #if RISCV64_Pipeline1
6631 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6632 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6633 "etiss_uint32 num_stages = 4;\n"
6634 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6635 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6637 #if RISCV64_Pipeline2
6638 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6639 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6640 "etiss_uint32 num_stages = 4;\n"
6641 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6642 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6645 "etiss_uint32 sh_val = 0;\n"
6646 "etiss_uint32 count = 0;\n"
6647 "etiss_int32 mask = 0;\n"
6652 #if RISCV64_DEBUG_CALL
6653 "printf(\"mask = %#x\\n\",mask); \n"
6655 "count = ((*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] & 0xffffffff) & mask);\n"
6656 #if RISCV64_DEBUG_CALL
6657 "printf(\"count = %#x\\n\",count); \n"
6659 "sh_val = ((*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff) << count);\n"
6660 #if RISCV64_DEBUG_CALL
6661 "printf(\"sh_val = %#x\\n\",sh_val); \n"
6663 "etiss_int32 cast_0 = sh_val; \n"
6664 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
6666 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
6668 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
6669 #if RISCV64_DEBUG_CALL
6670 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
6708 partInit.
code() = std::string(
"//slt\n")+
6709 "etiss_uint32 temp = 0;\n"
6710 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
6711 #if RISCV64_Pipeline1
6712 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6713 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6714 "etiss_uint32 num_stages = 4;\n"
6715 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6716 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6718 #if RISCV64_Pipeline2
6719 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6720 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6721 "etiss_uint32 num_stages = 4;\n"
6722 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6723 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6726 "etiss_int8 choose1 = 0;\n"
6730 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"]; \n"
6731 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
6733 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
6735 "etiss_int64 cast_1 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
6736 "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n"
6738 "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n"
6740 "if((etiss_int64)cast_1 < (etiss_int64)cast_0)\n"
6743 #if RISCV64_DEBUG_CALL
6744 "printf(\"choose1 = %#x\\n\",choose1); \n"
6751 #if RISCV64_DEBUG_CALL
6752 "printf(\"choose1 = %#x\\n\",choose1); \n"
6755 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = choose1;\n"
6756 #if RISCV64_DEBUG_CALL
6757 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
6795 partInit.
code() = std::string(
"//sltu\n")+
6796 "etiss_uint32 temp = 0;\n"
6797 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
6798 #if RISCV64_Pipeline1
6799 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6800 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6801 "etiss_uint32 num_stages = 4;\n"
6802 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6803 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6805 #if RISCV64_Pipeline2
6806 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6807 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6808 "etiss_uint32 num_stages = 4;\n"
6809 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6810 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6813 "etiss_int8 choose1 = 0;\n"
6817 "if((etiss_uint64)*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] < (etiss_uint64)*((RISCV64*)cpu)->X[" +
toString(rs2) +
"])\n"
6820 #if RISCV64_DEBUG_CALL
6821 "printf(\"choose1 = %#x\\n\",choose1); \n"
6828 #if RISCV64_DEBUG_CALL
6829 "printf(\"choose1 = %#x\\n\",choose1); \n"
6832 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = choose1;\n"
6833 #if RISCV64_DEBUG_CALL
6834 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
6872 partInit.
code() = std::string(
"//xor\n")+
6873 "etiss_uint32 temp = 0;\n"
6874 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
6875 #if RISCV64_Pipeline1
6876 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6877 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6878 "etiss_uint32 num_stages = 4;\n"
6879 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6880 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6882 #if RISCV64_Pipeline2
6883 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6884 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6885 "etiss_uint32 num_stages = 4;\n"
6886 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6887 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6893 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] ^ *((RISCV64*)cpu)->X[" +
toString(rs2) +
"]);\n"
6894 #if RISCV64_DEBUG_CALL
6895 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
6933 partInit.
code() = std::string(
"//srl\n")+
6934 "etiss_uint32 temp = 0;\n"
6935 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
6936 #if RISCV64_Pipeline1
6937 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6938 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6939 "etiss_uint32 num_stages = 4;\n"
6940 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6941 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6943 #if RISCV64_Pipeline2
6944 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6945 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6946 "etiss_uint32 num_stages = 4;\n"
6947 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6948 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6954 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] >> (*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] & 64 - 1));\n"
6955 #if RISCV64_DEBUG_CALL
6956 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
6993 partInit.
code() = std::string(
"//srliw\n")+
6994 "etiss_uint32 temp = 0;\n"
6995 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
6996 #if RISCV64_Pipeline1
6997 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6998 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6999 "etiss_uint32 num_stages = 4;\n"
7000 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7001 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7003 #if RISCV64_Pipeline2
7004 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7005 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7006 "etiss_uint32 num_stages = 4;\n"
7007 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7008 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7011 "etiss_uint32 sh_val = 0;\n"
7015 "sh_val = ((*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff) >> " +
toString(shamt) +
");\n"
7016 #if RISCV64_DEBUG_CALL
7017 "printf(\"sh_val = %#x\\n\",sh_val); \n"
7019 "etiss_int32 cast_0 = sh_val; \n"
7020 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
7022 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
7024 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
7025 #if RISCV64_DEBUG_CALL
7026 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
7064 partInit.
code() = std::string(
"//srlw\n")+
7065 "etiss_uint32 temp = 0;\n"
7066 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
7067 #if RISCV64_Pipeline1
7068 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7069 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7070 "etiss_uint32 num_stages = 4;\n"
7071 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7072 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7074 #if RISCV64_Pipeline2
7075 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7076 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7077 "etiss_uint32 num_stages = 4;\n"
7078 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7079 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7082 "etiss_uint32 sh_val = 0;\n"
7083 "etiss_uint32 count = 0;\n"
7084 "etiss_int32 mask = 0;\n"
7089 #if RISCV64_DEBUG_CALL
7090 "printf(\"mask = %#x\\n\",mask); \n"
7092 "count = ((*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] & 0xffffffff) & mask);\n"
7093 #if RISCV64_DEBUG_CALL
7094 "printf(\"count = %#x\\n\",count); \n"
7096 "sh_val = ((*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff) >> count);\n"
7097 #if RISCV64_DEBUG_CALL
7098 "printf(\"sh_val = %#x\\n\",sh_val); \n"
7100 "etiss_int32 cast_0 = sh_val; \n"
7101 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
7103 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
7105 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
7106 #if RISCV64_DEBUG_CALL
7107 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
7145 partInit.
code() = std::string(
"//or\n")+
7146 "etiss_uint32 temp = 0;\n"
7147 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
7148 #if RISCV64_Pipeline1
7149 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7150 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7151 "etiss_uint32 num_stages = 4;\n"
7152 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7153 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7155 #if RISCV64_Pipeline2
7156 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7157 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7158 "etiss_uint32 num_stages = 4;\n"
7159 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7160 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7166 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] | *((RISCV64*)cpu)->X[" +
toString(rs2) +
"]);\n"
7167 #if RISCV64_DEBUG_CALL
7168 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
7206 partInit.
code() = std::string(
"//and\n")+
7207 "etiss_uint32 temp = 0;\n"
7208 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
7209 #if RISCV64_Pipeline1
7210 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7211 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7212 "etiss_uint32 num_stages = 4;\n"
7213 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7214 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7216 #if RISCV64_Pipeline2
7217 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7218 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7219 "etiss_uint32 num_stages = 4;\n"
7220 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7221 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7227 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & *((RISCV64*)cpu)->X[" +
toString(rs2) +
"]);\n"
7228 #if RISCV64_DEBUG_CALL
7229 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
7252 partInit.
code() = std::string(
"//uret\n")+
7253 "etiss_uint32 temp = 0;\n"
7254 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
7256 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7257 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7258 "etiss_uint32 num_stages = 4;\n"
7259 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7260 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7263 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7264 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7265 "etiss_uint32 num_stages = 4;\n"
7266 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7267 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7271 "((RISCV64*)cpu)->CSR[3088] = 0;\n"
7272 "((RISCV64*)cpu)->CSR[0] ^= ((etiss_uint32)((((RISCV64*)cpu)->CSR[0] & 0x10)>>4)) ^ (((RISCV64*)cpu)->CSR[0] & 0x1);\n"
7273 "cpu->instructionPointer = ((RISCV64*)cpu)->CSR[65];\n"
7274 "((RISCV64*)cpu)->CSR[768]= ((RISCV64*)cpu)->CSR[0];\n"
7275 "((RISCV64*)cpu)->CSR[256]=((RISCV64*)cpu)->CSR[0];\n"
7277 "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n"
7313 partInit.
code() = std::string(
"//fadd.s\n")+
7314 "etiss_uint32 temp = 0;\n"
7315 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
7316 #if RISCV64_Pipeline1
7317 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7318 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7319 "etiss_uint32 num_stages = 4;\n"
7320 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7321 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7323 #if RISCV64_Pipeline2
7324 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7325 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7326 "etiss_uint32 num_stages = 4;\n"
7327 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7328 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7331 "etiss_uint32 res = 0;\n"
7332 "etiss_int64 upper = 0;\n"
7333 "etiss_uint32 flags = 0;\n"
7334 "etiss_uint32 frs1 = 0;\n"
7335 "etiss_uint32 choose1 = 0;\n"
7336 "etiss_uint32 frs2 = 0;\n"
7342 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
7343 #if RISCV64_DEBUG_CALL
7344 "printf(\"choose1 = %#x\\n\",choose1); \n"
7350 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
7351 #if RISCV64_DEBUG_CALL
7352 "printf(\"choose1 = %#x\\n\",choose1); \n"
7355 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = fadd_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"], ((RISCV64*)cpu)->F[" +
toString(rs2) +
"], choose1);\n"
7356 #if RISCV64_DEBUG_CALL
7357 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
7363 "frs1 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"]);\n"
7364 #if RISCV64_DEBUG_CALL
7365 "printf(\"frs1 = %#x\\n\",frs1); \n"
7367 "frs2 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs2) +
"]);\n"
7368 #if RISCV64_DEBUG_CALL
7369 "printf(\"frs2 = %#x\\n\",frs2); \n"
7373 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
7374 #if RISCV64_DEBUG_CALL
7375 "printf(\"choose1 = %#x\\n\",choose1); \n"
7381 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
7382 #if RISCV64_DEBUG_CALL
7383 "printf(\"choose1 = %#x\\n\",choose1); \n"
7386 "res = fadd_s(frs1, frs2, choose1);\n"
7387 #if RISCV64_DEBUG_CALL
7388 "printf(\"res = %#x\\n\",res); \n"
7391 #if RISCV64_DEBUG_CALL
7392 "printf(\"upper = %#lx\\n\",upper); \n"
7394 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 32) | (etiss_uint64)res);\n"
7395 #if RISCV64_DEBUG_CALL
7396 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
7399 "flags = fget_flags();\n"
7400 #if RISCV64_DEBUG_CALL
7401 "printf(\"flags = %#x\\n\",flags); \n"
7403 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
7404 #if RISCV64_DEBUG_CALL
7405 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
7441 partInit.
code() = std::string(
"//sub\n")+
7442 "etiss_uint32 temp = 0;\n"
7443 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
7444 #if RISCV64_Pipeline1
7445 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7446 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7447 "etiss_uint32 num_stages = 4;\n"
7448 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7449 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7451 #if RISCV64_Pipeline2
7452 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7453 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7454 "etiss_uint32 num_stages = 4;\n"
7455 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7456 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7462 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"] - *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
7463 #if RISCV64_DEBUG_CALL
7464 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
7502 partInit.
code() = std::string(
"//subw\n")+
7503 "etiss_uint32 temp = 0;\n"
7504 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
7505 #if RISCV64_Pipeline1
7506 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7507 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7508 "etiss_uint32 num_stages = 4;\n"
7509 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7510 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7512 #if RISCV64_Pipeline2
7513 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7514 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7515 "etiss_uint32 num_stages = 4;\n"
7516 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7517 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7520 "etiss_uint32 res = 0;\n"
7524 "res = (*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff) - (*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] & 0xffffffff);\n"
7525 #if RISCV64_DEBUG_CALL
7526 "printf(\"res = %#x\\n\",res); \n"
7528 "etiss_int32 cast_0 = res; \n"
7529 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
7531 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
7533 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
7534 #if RISCV64_DEBUG_CALL
7535 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
7573 partInit.
code() = std::string(
"//sra\n")+
7574 "etiss_uint32 temp = 0;\n"
7575 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
7576 #if RISCV64_Pipeline1
7577 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7578 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7579 "etiss_uint32 num_stages = 4;\n"
7580 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7581 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7583 #if RISCV64_Pipeline2
7584 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7585 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7586 "etiss_uint32 num_stages = 4;\n"
7587 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7588 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7594 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
7595 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
7597 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
7599 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = ((etiss_int64)cast_0 >> (*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] & 64 - 1));\n"
7600 #if RISCV64_DEBUG_CALL
7601 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
7638 partInit.
code() = std::string(
"//sraiw\n")+
7639 "etiss_uint32 temp = 0;\n"
7640 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
7641 #if RISCV64_Pipeline1
7642 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7643 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7644 "etiss_uint32 num_stages = 4;\n"
7645 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7646 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7648 #if RISCV64_Pipeline2
7649 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7650 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7651 "etiss_uint32 num_stages = 4;\n"
7652 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7653 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7656 "etiss_int32 sh_val = 0;\n"
7660 "etiss_int64 cast_0 = (*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff); \n"
7661 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
7663 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
7665 "sh_val = ((etiss_int32)cast_0 >> " +
toString(shamt) +
");\n"
7666 #if RISCV64_DEBUG_CALL
7667 "printf(\"sh_val = %#x\\n\",sh_val); \n"
7669 "etiss_int32 cast_1 = sh_val; \n"
7670 "if((etiss_int32)((etiss_uint32)cast_1 - 0x80000000) > 0x0)\n"
7672 "cast_1 =0x0 + (etiss_uint32)cast_1 ;\n"
7674 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_1;\n"
7675 #if RISCV64_DEBUG_CALL
7676 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
7714 partInit.
code() = std::string(
"//sraw\n")+
7715 "etiss_uint32 temp = 0;\n"
7716 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
7717 #if RISCV64_Pipeline1
7718 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7719 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7720 "etiss_uint32 num_stages = 4;\n"
7721 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7722 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7724 #if RISCV64_Pipeline2
7725 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7726 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7727 "etiss_uint32 num_stages = 4;\n"
7728 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7729 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7732 "etiss_uint32 sh_val = 0;\n"
7733 "etiss_uint32 count = 0;\n"
7734 "etiss_int32 mask = 0;\n"
7739 #if RISCV64_DEBUG_CALL
7740 "printf(\"mask = %#x\\n\",mask); \n"
7742 "count = ((*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] & 0xffffffff) & mask);\n"
7743 #if RISCV64_DEBUG_CALL
7744 "printf(\"count = %#x\\n\",count); \n"
7746 "etiss_int64 cast_0 = (*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff); \n"
7747 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
7749 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
7751 "sh_val = ((etiss_int32)cast_0 >> count);\n"
7752 #if RISCV64_DEBUG_CALL
7753 "printf(\"sh_val = %#x\\n\",sh_val); \n"
7755 "etiss_int32 cast_1 = sh_val; \n"
7756 "if((etiss_int32)((etiss_uint32)cast_1 - 0x80000000) > 0x0)\n"
7758 "cast_1 =0x0 + (etiss_uint32)cast_1 ;\n"
7760 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_1;\n"
7761 #if RISCV64_DEBUG_CALL
7762 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
7798 partInit.
code() = std::string(
"//fcvt.s.d\n")+
7799 "etiss_uint32 temp = 0;\n"
7800 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
7801 #if RISCV64_Pipeline1
7802 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7803 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7804 "etiss_uint32 num_stages = 4;\n"
7805 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7806 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7808 #if RISCV64_Pipeline2
7809 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7810 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7811 "etiss_uint32 num_stages = 4;\n"
7812 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7813 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7816 "etiss_uint32 res = 0;\n"
7817 "etiss_int64 upper = 0;\n"
7819 "res = fconv_d2f(((RISCV64*)cpu)->F[" +
toString(rs1) +
"], (" +
toString(rm) +
" & 0xff));\n"
7820 #if RISCV64_DEBUG_CALL
7821 "printf(\"res = %#x\\n\",res); \n"
7824 #if RISCV64_DEBUG_CALL
7825 "printf(\"upper = %#lx\\n\",upper); \n"
7827 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 32) | (etiss_uint64)res);\n"
7828 #if RISCV64_DEBUG_CALL
7829 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
7867 partInit.
code() = std::string(
"//fence\n")+
7868 "etiss_uint32 temp = 0;\n"
7869 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
7870 #if RISCV64_Pipeline1
7871 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7872 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7873 "etiss_uint32 num_stages = 4;\n"
7874 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7875 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7877 #if RISCV64_Pipeline2
7878 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7879 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7880 "etiss_uint32 num_stages = 4;\n"
7881 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7882 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7886 "((RISCV64*)cpu)->FENCE[0] = ((" +
toString(pred) +
" << 4) | " +
toString(succ) +
");\n"
7887 #if RISCV64_DEBUG_CALL
7888 "printf(\"((RISCV64*)cpu)->FENCE[0] = %#lx\\n\",((RISCV64*)cpu)->FENCE[0]); \n"
7909 partInit.
code() = std::string(
"//ecall\n")+
7910 "etiss_uint32 exception = 0;\n"
7911 "etiss_uint32 temp = 0;\n"
7912 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
7914 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7915 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7916 "etiss_uint32 num_stages = 4;\n"
7917 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7918 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7921 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7922 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7923 "etiss_uint32 num_stages = 4;\n"
7924 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7925 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7929 "exception = ETISS_RETURNCODE_SYSCALL; \n"
7933 "return exception;\n"
7950 partInit.
code() = std::string(
"//ebreak\n")+
7951 "etiss_uint32 exception = 0;\n"
7952 "etiss_uint32 temp = 0;\n"
7953 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
7955 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7956 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7957 "etiss_uint32 num_stages = 4;\n"
7958 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7959 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7962 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7963 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7964 "etiss_uint32 num_stages = 4;\n"
7965 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7966 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7970 "return ETISS_RETURNCODE_CPUFINISHED; \n"
7974 "return exception;\n"
7991 partInit.
code() = std::string(
"//sret\n")+
7992 "etiss_uint32 temp = 0;\n"
7993 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
7995 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7996 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7997 "etiss_uint32 num_stages = 4;\n"
7998 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7999 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8002 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8003 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
8004 "etiss_uint32 num_stages = 4;\n"
8005 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8006 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8010 "((RISCV64*)cpu)->CSR[3088] = (((RISCV64*)cpu)->CSR[256] & 0x100)>>8;\n"
8011 "((RISCV64*)cpu)->CSR[256] ^= (((RISCV64*)cpu)->CSR[256] & 0x100);\n"
8012 "((RISCV64*)cpu)->CSR[256] ^= ((etiss_uint32)((((RISCV64*)cpu)->CSR[256] & 0x20)>>4)) ^ (((RISCV64*)cpu)->CSR[256] & 0x2);\n"
8013 "cpu->instructionPointer = ((RISCV64*)cpu)->CSR[321];\n"
8014 "((RISCV64*)cpu)->CSR[768]= ((RISCV64*)cpu)->CSR[256];\n"
8015 "((RISCV64*)cpu)->CSR[0]=((RISCV64*)cpu)->CSR[256];\n"
8017 "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n"
8036 partInit.
code() = std::string(
"//wfi\n")+
8037 "etiss_uint32 exception = 0;\n"
8038 "etiss_uint32 temp = 0;\n"
8039 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
8041 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8042 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
8043 "etiss_uint32 num_stages = 4;\n"
8044 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8045 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8048 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8049 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
8050 "etiss_uint32 num_stages = 4;\n"
8051 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8052 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8056 "return ETISS_RETURNCODE_CPUFINISHED; \n"
8060 "return exception;\n"
8094 partInit.
code() = std::string(
"//fmul.s\n")+
8095 "etiss_uint32 temp = 0;\n"
8096 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
8097 #if RISCV64_Pipeline1
8098 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8099 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
8100 "etiss_uint32 num_stages = 4;\n"
8101 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8102 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8104 #if RISCV64_Pipeline2
8105 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8106 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
8107 "etiss_uint32 num_stages = 4;\n"
8108 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8109 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8112 "etiss_uint32 res = 0;\n"
8113 "etiss_int64 upper = 0;\n"
8114 "etiss_uint32 flags = 0;\n"
8115 "etiss_uint32 frs1 = 0;\n"
8116 "etiss_uint32 choose1 = 0;\n"
8117 "etiss_uint32 frs2 = 0;\n"
8123 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
8124 #if RISCV64_DEBUG_CALL
8125 "printf(\"choose1 = %#x\\n\",choose1); \n"
8131 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
8132 #if RISCV64_DEBUG_CALL
8133 "printf(\"choose1 = %#x\\n\",choose1); \n"
8136 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = fmul_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"], ((RISCV64*)cpu)->F[" +
toString(rs2) +
"], choose1);\n"
8137 #if RISCV64_DEBUG_CALL
8138 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
8144 "frs1 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"]);\n"
8145 #if RISCV64_DEBUG_CALL
8146 "printf(\"frs1 = %#x\\n\",frs1); \n"
8148 "frs2 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs2) +
"]);\n"
8149 #if RISCV64_DEBUG_CALL
8150 "printf(\"frs2 = %#x\\n\",frs2); \n"
8154 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
8155 #if RISCV64_DEBUG_CALL
8156 "printf(\"choose1 = %#x\\n\",choose1); \n"
8162 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
8163 #if RISCV64_DEBUG_CALL
8164 "printf(\"choose1 = %#x\\n\",choose1); \n"
8167 "res = fmul_s(frs1, frs2, choose1);\n"
8168 #if RISCV64_DEBUG_CALL
8169 "printf(\"res = %#x\\n\",res); \n"
8172 #if RISCV64_DEBUG_CALL
8173 "printf(\"upper = %#lx\\n\",upper); \n"
8175 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 32) | (etiss_uint64)res);\n"
8176 #if RISCV64_DEBUG_CALL
8177 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
8180 "flags = fget_flags();\n"
8181 #if RISCV64_DEBUG_CALL
8182 "printf(\"flags = %#x\\n\",flags); \n"
8184 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
8185 #if RISCV64_DEBUG_CALL
8186 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
8207 partInit.
code() = std::string(
"//mret\n")+
8208 "etiss_uint32 temp = 0;\n"
8209 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
8211 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8212 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
8213 "etiss_uint32 num_stages = 4;\n"
8214 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8215 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8218 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8219 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
8220 "etiss_uint32 num_stages = 4;\n"
8221 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8222 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8226 "((RISCV64*)cpu)->CSR[3088] = (((RISCV64*)cpu)->CSR[768] & 0x1800)>>11;\n"
8227 "((RISCV64*)cpu)->CSR[768] ^= (((RISCV64*)cpu)->CSR[768] & 0x1800);\n"
8228 "((RISCV64*)cpu)->CSR[768] ^= ((etiss_uint32)((((RISCV64*)cpu)->CSR[768] & 0x80)>>4)) ^ (((RISCV64*)cpu)->CSR[768] & 0x8);\n"
8229 "cpu->instructionPointer = ((RISCV64*)cpu)->CSR[833];\n"
8230 "((RISCV64*)cpu)->CSR[0]= ((RISCV64*)cpu)->CSR[768];\n"
8231 "((RISCV64*)cpu)->CSR[256]=((RISCV64*)cpu)->CSR[768];\n"
8233 "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n"
8262 partInit.
code() = std::string(
"//sfence.vma\n")+
8263 "etiss_uint32 temp = 0;\n"
8264 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
8265 #if RISCV64_Pipeline1
8266 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8267 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
8268 "etiss_uint32 num_stages = 4;\n"
8269 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8270 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8272 #if RISCV64_Pipeline2
8273 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8274 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
8275 "etiss_uint32 num_stages = 4;\n"
8276 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8277 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8281 "((RISCV64*)cpu)->FENCE[2] = " +
toString(rs1) +
";\n"
8282 #if RISCV64_DEBUG_CALL
8283 "printf(\"((RISCV64*)cpu)->FENCE[2] = %#lx\\n\",((RISCV64*)cpu)->FENCE[2]); \n"
8285 "((RISCV64*)cpu)->FENCE[3] = " +
toString(rs2) +
";\n"
8286 #if RISCV64_DEBUG_CALL
8287 "printf(\"((RISCV64*)cpu)->FENCE[3] = %#lx\\n\",((RISCV64*)cpu)->FENCE[3]); \n"
8325 partInit.
code() = std::string(
"//fmul.d\n")+
8326 "etiss_uint32 temp = 0;\n"
8327 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
8328 #if RISCV64_Pipeline1
8329 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8330 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
8331 "etiss_uint32 num_stages = 4;\n"
8332 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8333 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8335 #if RISCV64_Pipeline2
8336 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8337 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
8338 "etiss_uint32 num_stages = 4;\n"
8339 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8340 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8343 "etiss_uint64 res = 0;\n"
8344 "etiss_int64 upper = 0;\n"
8345 "etiss_uint32 flags = 0;\n"
8346 "etiss_uint32 choose1 = 0;\n"
8350 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
8351 #if RISCV64_DEBUG_CALL
8352 "printf(\"choose1 = %#x\\n\",choose1); \n"
8358 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
8359 #if RISCV64_DEBUG_CALL
8360 "printf(\"choose1 = %#x\\n\",choose1); \n"
8363 "res = fmul_d((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F[" +
toString(rs2) +
"] & 0xffffffffffffffff), choose1);\n"
8364 #if RISCV64_DEBUG_CALL
8365 "printf(\"res = %#lx\\n\",res); \n"
8369 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
8370 #if RISCV64_DEBUG_CALL
8371 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
8378 #if RISCV64_DEBUG_CALL
8379 "printf(\"upper = %#lx\\n\",upper); \n"
8381 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 64) | res);\n"
8382 #if RISCV64_DEBUG_CALL
8383 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
8386 "flags = fget_flags();\n"
8387 #if RISCV64_DEBUG_CALL
8388 "printf(\"flags = %#x\\n\",flags); \n"
8390 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
8391 #if RISCV64_DEBUG_CALL
8392 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
8428 partInit.
code() = std::string(
"//mul\n")+
8429 "etiss_uint32 temp = 0;\n"
8430 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
8431 #if RISCV64_Pipeline1
8432 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8433 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {3}, {6, 7}};\n"
8434 "etiss_uint32 num_stages = 4;\n"
8435 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8436 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8438 #if RISCV64_Pipeline2
8439 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8440 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {8}, {6, 7}};\n"
8441 "etiss_uint32 num_stages = 4;\n"
8442 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8443 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8446 "etiss_uint64 res = 0;\n"
8450 "res = ((etiss_uint64)*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] * (etiss_uint64)*((RISCV64*)cpu)->X[" +
toString(rs2) +
"]);\n"
8451 #if RISCV64_DEBUG_CALL
8452 "printf(\"res = %#lx\\n\",res); \n"
8454 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_uint64)res;\n"
8455 #if RISCV64_DEBUG_CALL
8456 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
8494 partInit.
code() = std::string(
"//mulw\n")+
8495 "etiss_uint32 temp = 0;\n"
8496 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
8497 #if RISCV64_Pipeline1
8498 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8499 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
8500 "etiss_uint32 num_stages = 4;\n"
8501 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8502 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8504 #if RISCV64_Pipeline2
8505 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8506 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
8507 "etiss_uint32 num_stages = 4;\n"
8508 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8509 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8515 "etiss_int64 cast_0 = ((*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff) * (*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] & 0xffffffff)); \n"
8516 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
8518 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
8520 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
8521 #if RISCV64_DEBUG_CALL
8522 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
8560 partInit.
code() = std::string(
"//mulh\n")+
8561 "etiss_uint32 temp = 0;\n"
8562 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
8563 #if RISCV64_Pipeline1
8564 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8565 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
8566 "etiss_uint32 num_stages = 4;\n"
8567 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8568 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8570 #if RISCV64_Pipeline2
8571 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8572 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
8573 "etiss_uint32 num_stages = 4;\n"
8574 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8575 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8578 "etiss_int64 res = 0;\n"
8582 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"]; \n"
8583 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
8585 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
8587 "etiss_int64 cast_1 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
8588 "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n"
8590 "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n"
8592 "res = ((etiss_int64)cast_1 * (etiss_int64)cast_0);\n"
8593 #if RISCV64_DEBUG_CALL
8594 "printf(\"res = %#lx\\n\",res); \n"
8596 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_uint64)(res >> 64);\n"
8597 #if RISCV64_DEBUG_CALL
8598 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
8636 partInit.
code() = std::string(
"//mulhsu\n")+
8637 "etiss_uint32 temp = 0;\n"
8638 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
8639 #if RISCV64_Pipeline1
8640 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8641 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
8642 "etiss_uint32 num_stages = 4;\n"
8643 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8644 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8646 #if RISCV64_Pipeline2
8647 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8648 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
8649 "etiss_uint32 num_stages = 4;\n"
8650 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8651 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8654 "etiss_uint64 res = 0;\n"
8658 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
8659 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
8661 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
8663 "res = ((etiss_int64)cast_0 * (etiss_uint64)*((RISCV64*)cpu)->X[" +
toString(rs2) +
"]);\n"
8664 #if RISCV64_DEBUG_CALL
8665 "printf(\"res = %#lx\\n\",res); \n"
8667 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_uint64)(res >> 64);\n"
8668 #if RISCV64_DEBUG_CALL
8669 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
8707 partInit.
code() = std::string(
"//mulhu\n")+
8708 "etiss_uint32 temp = 0;\n"
8709 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
8710 #if RISCV64_Pipeline1
8711 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8712 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
8713 "etiss_uint32 num_stages = 4;\n"
8714 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8715 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8717 #if RISCV64_Pipeline2
8718 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8719 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
8720 "etiss_uint32 num_stages = 4;\n"
8721 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8722 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8725 "etiss_uint64 res = 0;\n"
8729 "res = ((etiss_uint64)*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] * (etiss_uint64)*((RISCV64*)cpu)->X[" +
toString(rs2) +
"]);\n"
8730 #if RISCV64_DEBUG_CALL
8731 "printf(\"res = %#lx\\n\",res); \n"
8733 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_uint64)(res >> 64);\n"
8734 #if RISCV64_DEBUG_CALL
8735 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
8773 partInit.
code() = std::string(
"//div\n")+
8774 "etiss_uint32 temp = 0;\n"
8775 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
8776 #if RISCV64_Pipeline1
8777 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8778 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
8779 "etiss_uint32 num_stages = 4;\n"
8780 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8781 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8783 #if RISCV64_Pipeline2
8784 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8785 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
8786 "etiss_uint32 num_stages = 4;\n"
8787 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8788 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8791 "etiss_int8 XLM1 = 0;\n"
8792 "etiss_int64 MMIN = 0;\n"
8793 "etiss_int64 M1 = 0;\n"
8794 "etiss_int64 ONE = 0;\n"
8798 "if(*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] != 0)\n"
8801 #if RISCV64_DEBUG_CALL
8802 "printf(\"M1 = %#lx\\n\",M1); \n"
8805 #if RISCV64_DEBUG_CALL
8806 "printf(\"XLM1 = %#x\\n\",XLM1); \n"
8809 #if RISCV64_DEBUG_CALL
8810 "printf(\"ONE = %#lx\\n\",ONE); \n"
8812 "MMIN = (ONE << XLM1);\n"
8813 #if RISCV64_DEBUG_CALL
8814 "printf(\"MMIN = %#lx\\n\",MMIN); \n"
8816 "if((*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] == MMIN) && (*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] == M1))\n"
8818 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = MMIN;\n"
8819 #if RISCV64_DEBUG_CALL
8820 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
8826 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"]; \n"
8827 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
8829 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
8831 "etiss_int64 cast_1 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
8832 "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n"
8834 "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n"
8836 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = ((etiss_int64)cast_1 / (etiss_int64)cast_0);\n"
8837 #if RISCV64_DEBUG_CALL
8838 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
8845 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = - 1;\n"
8846 #if RISCV64_DEBUG_CALL
8847 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
8886 partInit.
code() = std::string(
"//divw\n")+
8887 "etiss_uint32 temp = 0;\n"
8888 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
8889 #if RISCV64_Pipeline1
8890 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8891 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
8892 "etiss_uint32 num_stages = 4;\n"
8893 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8894 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8896 #if RISCV64_Pipeline2
8897 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8898 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
8899 "etiss_uint32 num_stages = 4;\n"
8900 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8901 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8904 "etiss_int32 MMIN = 0;\n"
8905 "etiss_int32 M1 = 0;\n"
8906 "etiss_int32 ONE = 0;\n"
8910 "if(*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] != 0)\n"
8913 #if RISCV64_DEBUG_CALL
8914 "printf(\"M1 = %#x\\n\",M1); \n"
8917 #if RISCV64_DEBUG_CALL
8918 "printf(\"ONE = %#x\\n\",ONE); \n"
8920 "MMIN = (ONE << 31);\n"
8921 #if RISCV64_DEBUG_CALL
8922 "printf(\"MMIN = %#x\\n\",MMIN); \n"
8924 "if(((*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff) == MMIN) && ((*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] & 0xffffffff) == M1))\n"
8926 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = ( - 1 << 31);\n"
8927 #if RISCV64_DEBUG_CALL
8928 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
8934 "etiss_int64 cast_0 = (*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] & 0xffffffff); \n"
8935 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
8937 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
8939 "etiss_int64 cast_1 = (*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff); \n"
8940 "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n"
8942 "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n"
8944 "etiss_int64 cast_2 = ((etiss_int64)cast_1 / (etiss_int64)cast_0); \n"
8945 "if((etiss_int64)((etiss_uint64)cast_2 - 0x8000000000000000) > 0x0)\n"
8947 "cast_2 =0x0 + (etiss_uint64)cast_2 ;\n"
8949 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_2;\n"
8950 #if RISCV64_DEBUG_CALL
8951 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
8958 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = - 1;\n"
8959 #if RISCV64_DEBUG_CALL
8960 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
8999 partInit.
code() = std::string(
"//divu\n")+
9000 "etiss_uint32 temp = 0;\n"
9001 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
9002 #if RISCV64_Pipeline1
9003 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
9004 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
9005 "etiss_uint32 num_stages = 4;\n"
9006 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
9007 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
9009 #if RISCV64_Pipeline2
9010 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
9011 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
9012 "etiss_uint32 num_stages = 4;\n"
9013 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
9014 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
9020 "if(*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] != 0)\n"
9022 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] / *((RISCV64*)cpu)->X[" +
toString(rs2) +
"]);\n"
9023 #if RISCV64_DEBUG_CALL
9024 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
9030 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = - 1;\n"
9031 #if RISCV64_DEBUG_CALL
9032 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
9071 partInit.
code() = std::string(
"//divuw\n")+
9072 "etiss_uint32 temp = 0;\n"
9073 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
9074 #if RISCV64_Pipeline1
9075 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
9076 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
9077 "etiss_uint32 num_stages = 4;\n"
9078 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
9079 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
9081 #if RISCV64_Pipeline2
9082 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
9083 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
9084 "etiss_uint32 num_stages = 4;\n"
9085 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
9086 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
9092 "if((*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] & 0xffffffff) != 0)\n"
9094 "etiss_int64 cast_0 = ((*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff) / (*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] & 0xffffffff)); \n"
9095 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
9097 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
9099 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
9100 #if RISCV64_DEBUG_CALL
9101 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
9107 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = - 1;\n"
9108 #if RISCV64_DEBUG_CALL
9109 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
9148 partInit.
code() = std::string(
"//rem\n")+
9149 "etiss_uint32 temp = 0;\n"
9150 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
9151 #if RISCV64_Pipeline1
9152 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
9153 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
9154 "etiss_uint32 num_stages = 4;\n"
9155 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
9156 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
9158 #if RISCV64_Pipeline2
9159 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
9160 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
9161 "etiss_uint32 num_stages = 4;\n"
9162 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
9163 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
9166 "etiss_int32 XLM1 = 0;\n"
9167 "etiss_int64 MMIN = 0;\n"
9168 "etiss_int64 M1 = 0;\n"
9169 "etiss_int64 ONE = 0;\n"
9173 "if(*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] != 0)\n"
9176 #if RISCV64_DEBUG_CALL
9177 "printf(\"M1 = %#lx\\n\",M1); \n"
9180 #if RISCV64_DEBUG_CALL
9181 "printf(\"XLM1 = %#x\\n\",XLM1); \n"
9184 #if RISCV64_DEBUG_CALL
9185 "printf(\"ONE = %#lx\\n\",ONE); \n"
9187 "MMIN = (ONE << XLM1);\n"
9188 #if RISCV64_DEBUG_CALL
9189 "printf(\"MMIN = %#lx\\n\",MMIN); \n"
9191 "if((*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] == MMIN) && (*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] == M1))\n"
9193 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = 0;\n"
9194 #if RISCV64_DEBUG_CALL
9195 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
9201 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"]; \n"
9202 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
9204 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
9206 "etiss_int64 cast_1 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
9207 "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n"
9209 "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n"
9211 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = ((etiss_int64)cast_1 % (etiss_int64)cast_0);\n"
9212 #if RISCV64_DEBUG_CALL
9213 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
9220 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
9221 #if RISCV64_DEBUG_CALL
9222 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
9261 partInit.
code() = std::string(
"//remw\n")+
9262 "etiss_uint32 temp = 0;\n"
9263 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
9264 #if RISCV64_Pipeline1
9265 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
9266 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
9267 "etiss_uint32 num_stages = 4;\n"
9268 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
9269 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
9271 #if RISCV64_Pipeline2
9272 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
9273 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
9274 "etiss_uint32 num_stages = 4;\n"
9275 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
9276 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
9279 "etiss_int32 MMIN = 0;\n"
9280 "etiss_int32 M1 = 0;\n"
9281 "etiss_int32 ONE = 0;\n"
9285 "if(*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] != 0)\n"
9288 #if RISCV64_DEBUG_CALL
9289 "printf(\"M1 = %#x\\n\",M1); \n"
9292 #if RISCV64_DEBUG_CALL
9293 "printf(\"ONE = %#x\\n\",ONE); \n"
9295 "MMIN = (ONE << 31);\n"
9296 #if RISCV64_DEBUG_CALL
9297 "printf(\"MMIN = %#x\\n\",MMIN); \n"
9299 "if(((*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff) == MMIN) && (*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] == M1))\n"
9301 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = 0;\n"
9302 #if RISCV64_DEBUG_CALL
9303 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
9309 "etiss_int64 cast_0 = (*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] & 0xffffffff); \n"
9310 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
9312 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
9314 "etiss_int64 cast_1 = (*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff); \n"
9315 "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n"
9317 "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n"
9319 "etiss_int64 cast_2 = ((etiss_int64)cast_1 % (etiss_int64)cast_0); \n"
9320 "if((etiss_int64)((etiss_uint64)cast_2 - 0x8000000000000000) > 0x0)\n"
9322 "cast_2 =0x0 + (etiss_uint64)cast_2 ;\n"
9324 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_2;\n"
9325 #if RISCV64_DEBUG_CALL
9326 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
9333 "etiss_int64 cast_3 = (*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff); \n"
9334 "if((etiss_int64)((etiss_uint64)cast_3 - 0x8000000000000000) > 0x0)\n"
9336 "cast_3 =0x0 + (etiss_uint64)cast_3 ;\n"
9338 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_3;\n"
9339 #if RISCV64_DEBUG_CALL
9340 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
9379 partInit.
code() = std::string(
"//remu\n")+
9380 "etiss_uint32 temp = 0;\n"
9381 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
9382 #if RISCV64_Pipeline1
9383 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
9384 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
9385 "etiss_uint32 num_stages = 4;\n"
9386 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
9387 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
9389 #if RISCV64_Pipeline2
9390 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
9391 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
9392 "etiss_uint32 num_stages = 4;\n"
9393 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
9394 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
9400 "if(*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] != 0)\n"
9402 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] % *((RISCV64*)cpu)->X[" +
toString(rs2) +
"]);\n"
9403 #if RISCV64_DEBUG_CALL
9404 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
9410 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
9411 #if RISCV64_DEBUG_CALL
9412 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
9451 partInit.
code() = std::string(
"//remuw\n")+
9452 "etiss_uint32 temp = 0;\n"
9453 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
9454 #if RISCV64_Pipeline1
9455 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
9456 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
9457 "etiss_uint32 num_stages = 4;\n"
9458 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
9459 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
9461 #if RISCV64_Pipeline2
9462 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
9463 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
9464 "etiss_uint32 num_stages = 4;\n"
9465 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
9466 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
9472 "if((*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] & 0xffffffff) != 0)\n"
9474 "etiss_int64 cast_0 = ((*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff) % (*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] & 0xffffffff)); \n"
9475 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
9477 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
9479 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
9480 #if RISCV64_DEBUG_CALL
9481 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
9487 "etiss_int64 cast_1 = (*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff); \n"
9488 "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n"
9490 "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n"
9492 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_1;\n"
9493 #if RISCV64_DEBUG_CALL
9494 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
9535 partInit.
code() = std::string(
"//fadd.d\n")+
9536 "etiss_uint32 temp = 0;\n"
9537 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
9538 #if RISCV64_Pipeline1
9539 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
9540 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
9541 "etiss_uint32 num_stages = 4;\n"
9542 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
9543 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
9545 #if RISCV64_Pipeline2
9546 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
9547 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
9548 "etiss_uint32 num_stages = 4;\n"
9549 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
9550 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
9553 "etiss_uint64 res = 0;\n"
9554 "etiss_int64 upper = 0;\n"
9555 "etiss_uint32 flags = 0;\n"
9556 "etiss_uint32 choose1 = 0;\n"
9560 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
9561 #if RISCV64_DEBUG_CALL
9562 "printf(\"choose1 = %#x\\n\",choose1); \n"
9568 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
9569 #if RISCV64_DEBUG_CALL
9570 "printf(\"choose1 = %#x\\n\",choose1); \n"
9573 "res = fadd_d((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F[" +
toString(rs2) +
"] & 0xffffffffffffffff), choose1);\n"
9574 #if RISCV64_DEBUG_CALL
9575 "printf(\"res = %#lx\\n\",res); \n"
9579 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
9580 #if RISCV64_DEBUG_CALL
9581 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
9588 #if RISCV64_DEBUG_CALL
9589 "printf(\"upper = %#lx\\n\",upper); \n"
9591 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 64) | res);\n"
9592 #if RISCV64_DEBUG_CALL
9593 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
9596 "flags = fget_flags();\n"
9597 #if RISCV64_DEBUG_CALL
9598 "printf(\"flags = %#x\\n\",flags); \n"
9600 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
9601 #if RISCV64_DEBUG_CALL
9602 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
9641 partInit.
code() = std::string(
"//lr.w\n")+
9642 "etiss_uint32 exception = 0;\n"
9643 "etiss_uint32 temp = 0;\n"
9644 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
9645 #if RISCV64_Pipeline1
9646 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
9647 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
9648 "etiss_uint32 num_stages = 4;\n"
9649 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
9650 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
9652 #if RISCV64_Pipeline2
9653 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
9654 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
9655 "etiss_uint32 num_stages = 4;\n"
9656 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
9657 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
9660 "etiss_uint64 offs = 0;\n"
9664 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
9665 #if RISCV64_DEBUG_CALL
9666 "printf(\"offs = %#lx\\n\",offs); \n"
9668 "etiss_uint32 MEM_offs;\n"
9669 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
9670 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n"
9671 "etiss_int32 cast_0 = MEM_offs; \n"
9672 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
9674 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
9676 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
9677 #if RISCV64_DEBUG_CALL
9678 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
9680 "((RISCV64*)cpu)->RES = offs;\n"
9681 #if RISCV64_DEBUG_CALL
9682 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
9689 "return exception;\n"
9724 partInit.
code() = std::string(
"//lr.d\n")+
9725 "etiss_uint32 exception = 0;\n"
9726 "etiss_uint32 temp = 0;\n"
9727 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
9728 #if RISCV64_Pipeline1
9729 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
9730 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
9731 "etiss_uint32 num_stages = 4;\n"
9732 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
9733 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
9735 #if RISCV64_Pipeline2
9736 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
9737 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
9738 "etiss_uint32 num_stages = 4;\n"
9739 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
9740 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
9743 "etiss_uint64 offs = 0;\n"
9747 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
9748 #if RISCV64_DEBUG_CALL
9749 "printf(\"offs = %#lx\\n\",offs); \n"
9751 "etiss_uint64 MEM_offs;\n"
9752 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
9753 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n"
9754 "etiss_int64 cast_0 = MEM_offs; \n"
9755 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
9757 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
9759 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
9760 #if RISCV64_DEBUG_CALL
9761 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
9763 "((RISCV64*)cpu)->RES = offs;\n"
9764 #if RISCV64_DEBUG_CALL
9765 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
9772 "return exception;\n"
9812 partInit.
code() = std::string(
"//sc.w\n")+
9813 "etiss_uint32 exception = 0;\n"
9814 "etiss_uint32 temp = 0;\n"
9815 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
9816 #if RISCV64_Pipeline1
9817 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
9818 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
9819 "etiss_uint32 num_stages = 4;\n"
9820 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
9821 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
9823 #if RISCV64_Pipeline2
9824 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
9825 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
9826 "etiss_uint32 num_stages = 4;\n"
9827 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
9828 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
9831 "etiss_uint64 offs = 0;\n"
9833 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
9834 #if RISCV64_DEBUG_CALL
9835 "printf(\"offs = %#lx\\n\",offs); \n"
9837 "if(offs == ((RISCV64*)cpu)->RES)\n"
9839 "etiss_uint32 MEM_offs;\n"
9840 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
9841 "MEM_offs = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
9842 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n"
9843 #if RISCV64_DEBUG_CALL
9844 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
9848 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = 0;\n"
9849 #if RISCV64_DEBUG_CALL
9850 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
9854 "((RISCV64*)cpu)->RES = 0;\n"
9855 #if RISCV64_DEBUG_CALL
9856 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
9864 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = 1;\n"
9865 #if RISCV64_DEBUG_CALL
9866 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
9870 "((RISCV64*)cpu)->RES = 0;\n"
9871 #if RISCV64_DEBUG_CALL
9872 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
9878 "return exception;\n"
9918 partInit.
code() = std::string(
"//sc.d\n")+
9919 "etiss_uint32 exception = 0;\n"
9920 "etiss_uint32 temp = 0;\n"
9921 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
9922 #if RISCV64_Pipeline1
9923 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
9924 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
9925 "etiss_uint32 num_stages = 4;\n"
9926 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
9927 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
9929 #if RISCV64_Pipeline2
9930 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
9931 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
9932 "etiss_uint32 num_stages = 4;\n"
9933 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
9934 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
9937 "etiss_uint64 offs = 0;\n"
9939 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
9940 #if RISCV64_DEBUG_CALL
9941 "printf(\"offs = %#lx\\n\",offs); \n"
9943 "if(offs == ((RISCV64*)cpu)->RES)\n"
9945 "etiss_uint64 MEM_offs;\n"
9946 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
9947 "MEM_offs = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
9948 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n"
9949 #if RISCV64_DEBUG_CALL
9950 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
9954 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = 0;\n"
9955 #if RISCV64_DEBUG_CALL
9956 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
9960 "((RISCV64*)cpu)->RES = 0;\n"
9961 #if RISCV64_DEBUG_CALL
9962 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
9970 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = 1;\n"
9971 #if RISCV64_DEBUG_CALL
9972 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
9976 "((RISCV64*)cpu)->RES = 0;\n"
9977 #if RISCV64_DEBUG_CALL
9978 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
9984 "return exception;\n"
10024 partInit.
code() = std::string(
"//amoswap.w\n")+
10025 "etiss_uint32 exception = 0;\n"
10026 "etiss_uint32 temp = 0;\n"
10027 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
10028 #if RISCV64_Pipeline1
10029 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
10030 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
10031 "etiss_uint32 num_stages = 4;\n"
10032 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
10033 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
10035 #if RISCV64_Pipeline2
10036 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
10037 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
10038 "etiss_uint32 num_stages = 4;\n"
10039 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
10040 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
10043 "etiss_uint64 offs = 0;\n"
10045 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
10046 #if RISCV64_DEBUG_CALL
10047 "printf(\"offs = %#lx\\n\",offs); \n"
10051 "etiss_uint32 MEM_offs;\n"
10052 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
10053 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n"
10054 "etiss_int32 cast_0 = MEM_offs; \n"
10055 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
10057 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
10059 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
10060 #if RISCV64_DEBUG_CALL
10061 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
10065 "etiss_uint32 MEM_offs;\n"
10066 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
10067 "MEM_offs = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
10068 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n"
10069 #if RISCV64_DEBUG_CALL
10070 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
10072 "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
10074 "((RISCV64*)cpu)->RES = 0;\n"
10075 #if RISCV64_DEBUG_CALL
10076 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
10083 "return exception;\n"
10123 partInit.
code() = std::string(
"//amoswap.d\n")+
10124 "etiss_uint32 exception = 0;\n"
10125 "etiss_uint32 temp = 0;\n"
10126 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
10127 #if RISCV64_Pipeline1
10128 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
10129 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
10130 "etiss_uint32 num_stages = 4;\n"
10131 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
10132 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
10134 #if RISCV64_Pipeline2
10135 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
10136 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
10137 "etiss_uint32 num_stages = 4;\n"
10138 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
10139 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
10142 "etiss_uint64 offs = 0;\n"
10144 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
10145 #if RISCV64_DEBUG_CALL
10146 "printf(\"offs = %#lx\\n\",offs); \n"
10150 "etiss_uint64 MEM_offs;\n"
10151 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
10152 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n"
10153 "etiss_int64 cast_0 = MEM_offs; \n"
10154 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
10156 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
10158 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
10159 #if RISCV64_DEBUG_CALL
10160 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
10164 "etiss_uint64 MEM_offs;\n"
10165 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
10166 "MEM_offs = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
10167 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n"
10168 #if RISCV64_DEBUG_CALL
10169 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
10171 "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
10173 "((RISCV64*)cpu)->RES = 0;\n"
10174 #if RISCV64_DEBUG_CALL
10175 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
10182 "return exception;\n"
10222 partInit.
code() = std::string(
"//amoadd.w\n")+
10223 "etiss_uint32 exception = 0;\n"
10224 "etiss_uint32 temp = 0;\n"
10225 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
10226 #if RISCV64_Pipeline1
10227 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
10228 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
10229 "etiss_uint32 num_stages = 4;\n"
10230 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
10231 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
10233 #if RISCV64_Pipeline2
10234 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
10235 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
10236 "etiss_uint32 num_stages = 4;\n"
10237 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
10238 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
10241 "etiss_uint64 offs = 0;\n"
10242 "etiss_int64 res1 = 0;\n"
10243 "etiss_uint64 res2 = 0;\n"
10245 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
10246 #if RISCV64_DEBUG_CALL
10247 "printf(\"offs = %#lx\\n\",offs); \n"
10249 "etiss_uint32 MEM_offs;\n"
10250 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
10251 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n"
10252 "etiss_int32 cast_0 = MEM_offs; \n"
10253 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
10255 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
10257 "res1 = (etiss_int64)cast_0;\n"
10258 #if RISCV64_DEBUG_CALL
10259 "printf(\"res1 = %#lx\\n\",res1); \n"
10263 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = res1;\n"
10264 #if RISCV64_DEBUG_CALL
10265 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
10269 "res2 = res1 + *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
10270 #if RISCV64_DEBUG_CALL
10271 "printf(\"res2 = %#lx\\n\",res2); \n"
10273 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
10274 "MEM_offs = res2;\n"
10275 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n"
10276 #if RISCV64_DEBUG_CALL
10277 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
10279 "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
10281 "((RISCV64*)cpu)->RES = 0;\n"
10282 #if RISCV64_DEBUG_CALL
10283 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
10290 "return exception;\n"
10330 partInit.
code() = std::string(
"//amoadd.d\n")+
10331 "etiss_uint32 exception = 0;\n"
10332 "etiss_uint32 temp = 0;\n"
10333 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
10334 #if RISCV64_Pipeline1
10335 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
10336 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
10337 "etiss_uint32 num_stages = 4;\n"
10338 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
10339 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
10341 #if RISCV64_Pipeline2
10342 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
10343 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
10344 "etiss_uint32 num_stages = 4;\n"
10345 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
10346 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
10349 "etiss_uint64 offs = 0;\n"
10350 "etiss_int64 res = 0;\n"
10351 "etiss_uint64 res2 = 0;\n"
10353 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
10354 #if RISCV64_DEBUG_CALL
10355 "printf(\"offs = %#lx\\n\",offs); \n"
10357 "etiss_uint64 MEM_offs;\n"
10358 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
10359 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n"
10360 "etiss_int64 cast_0 = MEM_offs; \n"
10361 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
10363 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
10365 "res = (etiss_int64)cast_0;\n"
10366 #if RISCV64_DEBUG_CALL
10367 "printf(\"res = %#lx\\n\",res); \n"
10371 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = res;\n"
10372 #if RISCV64_DEBUG_CALL
10373 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
10377 "res2 = res + *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
10378 #if RISCV64_DEBUG_CALL
10379 "printf(\"res2 = %#lx\\n\",res2); \n"
10381 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
10382 "MEM_offs = res2;\n"
10383 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n"
10384 #if RISCV64_DEBUG_CALL
10385 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
10387 "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
10389 "((RISCV64*)cpu)->RES = 0;\n"
10390 #if RISCV64_DEBUG_CALL
10391 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
10398 "return exception;\n"
10438 partInit.
code() = std::string(
"//amoxor.w\n")+
10439 "etiss_uint32 exception = 0;\n"
10440 "etiss_uint32 temp = 0;\n"
10441 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
10442 #if RISCV64_Pipeline1
10443 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
10444 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
10445 "etiss_uint32 num_stages = 4;\n"
10446 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
10447 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
10449 #if RISCV64_Pipeline2
10450 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
10451 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
10452 "etiss_uint32 num_stages = 4;\n"
10453 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
10454 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
10457 "etiss_uint64 offs = 0;\n"
10458 "etiss_int64 res1 = 0;\n"
10459 "etiss_uint64 res2 = 0;\n"
10461 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
10462 #if RISCV64_DEBUG_CALL
10463 "printf(\"offs = %#lx\\n\",offs); \n"
10465 "etiss_uint32 MEM_offs;\n"
10466 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
10467 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n"
10468 "etiss_int32 cast_0 = MEM_offs; \n"
10469 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
10471 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
10473 "res1 = (etiss_int64)cast_0;\n"
10474 #if RISCV64_DEBUG_CALL
10475 "printf(\"res1 = %#lx\\n\",res1); \n"
10479 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = res1;\n"
10480 #if RISCV64_DEBUG_CALL
10481 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
10485 "res2 = (res1 ^ *((RISCV64*)cpu)->X[" +
toString(rs2) +
"]);\n"
10486 #if RISCV64_DEBUG_CALL
10487 "printf(\"res2 = %#lx\\n\",res2); \n"
10489 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
10490 "MEM_offs = res2;\n"
10491 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n"
10492 #if RISCV64_DEBUG_CALL
10493 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
10495 "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
10497 "((RISCV64*)cpu)->RES = 0;\n"
10498 #if RISCV64_DEBUG_CALL
10499 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
10506 "return exception;\n"
10546 partInit.
code() = std::string(
"//amoxor.d\n")+
10547 "etiss_uint32 exception = 0;\n"
10548 "etiss_uint32 temp = 0;\n"
10549 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
10550 #if RISCV64_Pipeline1
10551 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
10552 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
10553 "etiss_uint32 num_stages = 4;\n"
10554 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
10555 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
10557 #if RISCV64_Pipeline2
10558 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
10559 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
10560 "etiss_uint32 num_stages = 4;\n"
10561 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
10562 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
10565 "etiss_uint64 offs = 0;\n"
10566 "etiss_int64 res = 0;\n"
10567 "etiss_uint64 res2 = 0;\n"
10569 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
10570 #if RISCV64_DEBUG_CALL
10571 "printf(\"offs = %#lx\\n\",offs); \n"
10573 "etiss_uint64 MEM_offs;\n"
10574 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
10575 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n"
10576 "etiss_int64 cast_0 = MEM_offs; \n"
10577 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
10579 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
10581 "res = (etiss_int64)cast_0;\n"
10582 #if RISCV64_DEBUG_CALL
10583 "printf(\"res = %#lx\\n\",res); \n"
10587 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = res;\n"
10588 #if RISCV64_DEBUG_CALL
10589 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
10593 "res2 = (res ^ *((RISCV64*)cpu)->X[" +
toString(rs2) +
"]);\n"
10594 #if RISCV64_DEBUG_CALL
10595 "printf(\"res2 = %#lx\\n\",res2); \n"
10597 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
10598 "MEM_offs = res2;\n"
10599 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n"
10600 #if RISCV64_DEBUG_CALL
10601 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
10603 "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
10605 "((RISCV64*)cpu)->RES = 0;\n"
10606 #if RISCV64_DEBUG_CALL
10607 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
10614 "return exception;\n"
10654 partInit.
code() = std::string(
"//amoand.w\n")+
10655 "etiss_uint32 exception = 0;\n"
10656 "etiss_uint32 temp = 0;\n"
10657 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
10658 #if RISCV64_Pipeline1
10659 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
10660 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
10661 "etiss_uint32 num_stages = 4;\n"
10662 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
10663 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
10665 #if RISCV64_Pipeline2
10666 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
10667 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
10668 "etiss_uint32 num_stages = 4;\n"
10669 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
10670 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
10673 "etiss_uint64 offs = 0;\n"
10674 "etiss_int64 res1 = 0;\n"
10675 "etiss_uint64 res2 = 0;\n"
10677 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
10678 #if RISCV64_DEBUG_CALL
10679 "printf(\"offs = %#lx\\n\",offs); \n"
10681 "etiss_uint32 MEM_offs;\n"
10682 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
10683 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n"
10684 "etiss_int32 cast_0 = MEM_offs; \n"
10685 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
10687 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
10689 "res1 = (etiss_int64)cast_0;\n"
10690 #if RISCV64_DEBUG_CALL
10691 "printf(\"res1 = %#lx\\n\",res1); \n"
10695 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = res1;\n"
10696 #if RISCV64_DEBUG_CALL
10697 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
10701 "res2 = (res1 & *((RISCV64*)cpu)->X[" +
toString(rs2) +
"]);\n"
10702 #if RISCV64_DEBUG_CALL
10703 "printf(\"res2 = %#lx\\n\",res2); \n"
10705 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
10706 "MEM_offs = res2;\n"
10707 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n"
10708 #if RISCV64_DEBUG_CALL
10709 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
10711 "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
10713 "((RISCV64*)cpu)->RES = 0;\n"
10714 #if RISCV64_DEBUG_CALL
10715 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
10722 "return exception;\n"
10762 partInit.
code() = std::string(
"//amoand.d\n")+
10763 "etiss_uint32 exception = 0;\n"
10764 "etiss_uint32 temp = 0;\n"
10765 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
10766 #if RISCV64_Pipeline1
10767 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
10768 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
10769 "etiss_uint32 num_stages = 4;\n"
10770 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
10771 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
10773 #if RISCV64_Pipeline2
10774 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
10775 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
10776 "etiss_uint32 num_stages = 4;\n"
10777 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
10778 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
10781 "etiss_uint64 offs = 0;\n"
10782 "etiss_int64 res = 0;\n"
10783 "etiss_uint64 res2 = 0;\n"
10785 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
10786 #if RISCV64_DEBUG_CALL
10787 "printf(\"offs = %#lx\\n\",offs); \n"
10789 "etiss_uint64 MEM_offs;\n"
10790 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
10791 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n"
10792 "etiss_int64 cast_0 = MEM_offs; \n"
10793 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
10795 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
10797 "res = (etiss_int64)cast_0;\n"
10798 #if RISCV64_DEBUG_CALL
10799 "printf(\"res = %#lx\\n\",res); \n"
10803 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = res;\n"
10804 #if RISCV64_DEBUG_CALL
10805 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
10809 "res2 = (res & *((RISCV64*)cpu)->X[" +
toString(rs2) +
"]);\n"
10810 #if RISCV64_DEBUG_CALL
10811 "printf(\"res2 = %#lx\\n\",res2); \n"
10813 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
10814 "MEM_offs = res2;\n"
10815 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n"
10816 #if RISCV64_DEBUG_CALL
10817 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
10819 "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
10821 "((RISCV64*)cpu)->RES = 0;\n"
10822 #if RISCV64_DEBUG_CALL
10823 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
10830 "return exception;\n"
10870 partInit.
code() = std::string(
"//amoor.w\n")+
10871 "etiss_uint32 exception = 0;\n"
10872 "etiss_uint32 temp = 0;\n"
10873 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
10874 #if RISCV64_Pipeline1
10875 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
10876 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
10877 "etiss_uint32 num_stages = 4;\n"
10878 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
10879 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
10881 #if RISCV64_Pipeline2
10882 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
10883 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
10884 "etiss_uint32 num_stages = 4;\n"
10885 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
10886 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
10889 "etiss_uint64 offs = 0;\n"
10890 "etiss_int64 res1 = 0;\n"
10891 "etiss_uint64 res2 = 0;\n"
10893 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
10894 #if RISCV64_DEBUG_CALL
10895 "printf(\"offs = %#lx\\n\",offs); \n"
10897 "etiss_uint32 MEM_offs;\n"
10898 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
10899 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n"
10900 "etiss_int32 cast_0 = MEM_offs; \n"
10901 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
10903 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
10905 "res1 = (etiss_int64)cast_0;\n"
10906 #if RISCV64_DEBUG_CALL
10907 "printf(\"res1 = %#lx\\n\",res1); \n"
10911 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = res1;\n"
10912 #if RISCV64_DEBUG_CALL
10913 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
10917 "res2 = (res1 | *((RISCV64*)cpu)->X[" +
toString(rs2) +
"]);\n"
10918 #if RISCV64_DEBUG_CALL
10919 "printf(\"res2 = %#lx\\n\",res2); \n"
10921 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
10922 "MEM_offs = res2;\n"
10923 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n"
10924 #if RISCV64_DEBUG_CALL
10925 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
10927 "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
10929 "((RISCV64*)cpu)->RES = 0;\n"
10930 #if RISCV64_DEBUG_CALL
10931 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
10938 "return exception;\n"
10978 partInit.
code() = std::string(
"//amoor.d\n")+
10979 "etiss_uint32 exception = 0;\n"
10980 "etiss_uint32 temp = 0;\n"
10981 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
10982 #if RISCV64_Pipeline1
10983 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
10984 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
10985 "etiss_uint32 num_stages = 4;\n"
10986 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
10987 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
10989 #if RISCV64_Pipeline2
10990 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
10991 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
10992 "etiss_uint32 num_stages = 4;\n"
10993 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
10994 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
10997 "etiss_uint64 offs = 0;\n"
10998 "etiss_int64 res = 0;\n"
10999 "etiss_uint64 res2 = 0;\n"
11001 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
11002 #if RISCV64_DEBUG_CALL
11003 "printf(\"offs = %#lx\\n\",offs); \n"
11005 "etiss_uint64 MEM_offs;\n"
11006 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
11007 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n"
11008 "etiss_int64 cast_0 = MEM_offs; \n"
11009 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
11011 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
11013 "res = (etiss_int64)cast_0;\n"
11014 #if RISCV64_DEBUG_CALL
11015 "printf(\"res = %#lx\\n\",res); \n"
11019 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = res;\n"
11020 #if RISCV64_DEBUG_CALL
11021 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
11025 "res2 = (res | *((RISCV64*)cpu)->X[" +
toString(rs2) +
"]);\n"
11026 #if RISCV64_DEBUG_CALL
11027 "printf(\"res2 = %#lx\\n\",res2); \n"
11029 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
11030 "MEM_offs = res2;\n"
11031 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n"
11032 #if RISCV64_DEBUG_CALL
11033 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
11035 "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
11037 "((RISCV64*)cpu)->RES = 0;\n"
11038 #if RISCV64_DEBUG_CALL
11039 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
11046 "return exception;\n"
11086 partInit.
code() = std::string(
"//amomin.w\n")+
11087 "etiss_uint32 exception = 0;\n"
11088 "etiss_uint32 temp = 0;\n"
11089 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
11090 #if RISCV64_Pipeline1
11091 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
11092 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
11093 "etiss_uint32 num_stages = 4;\n"
11094 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
11095 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
11097 #if RISCV64_Pipeline2
11098 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
11099 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
11100 "etiss_uint32 num_stages = 4;\n"
11101 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
11102 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
11105 "etiss_uint64 offs = 0;\n"
11106 "etiss_int64 res1 = 0;\n"
11107 "etiss_uint64 res2 = 0;\n"
11108 "etiss_uint64 choose1 = 0;\n"
11110 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
11111 #if RISCV64_DEBUG_CALL
11112 "printf(\"offs = %#lx\\n\",offs); \n"
11114 "etiss_uint32 MEM_offs;\n"
11115 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
11116 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n"
11117 "etiss_int32 cast_0 = MEM_offs; \n"
11118 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
11120 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
11122 "res1 = (etiss_int64)cast_0;\n"
11123 #if RISCV64_DEBUG_CALL
11124 "printf(\"res1 = %#lx\\n\",res1); \n"
11128 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = res1;\n"
11129 #if RISCV64_DEBUG_CALL
11130 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
11134 "etiss_int64 cast_1 = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"]; \n"
11135 "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n"
11137 "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n"
11139 "etiss_int64 cast_2 = res1; \n"
11140 "if((etiss_int64)((etiss_uint64)cast_2 - 0x8000000000000000) > 0x0)\n"
11142 "cast_2 =0x0 + (etiss_uint64)cast_2 ;\n"
11144 "if((etiss_int64)cast_2 > (etiss_int64)cast_1)\n"
11146 "choose1 = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
11147 #if RISCV64_DEBUG_CALL
11148 "printf(\"choose1 = %#lx\\n\",choose1); \n"
11154 "choose1 = res1;\n"
11155 #if RISCV64_DEBUG_CALL
11156 "printf(\"choose1 = %#lx\\n\",choose1); \n"
11159 "res2 = choose1;\n"
11160 #if RISCV64_DEBUG_CALL
11161 "printf(\"res2 = %#lx\\n\",res2); \n"
11163 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
11164 "MEM_offs = res2;\n"
11165 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n"
11166 #if RISCV64_DEBUG_CALL
11167 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
11169 "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
11171 "((RISCV64*)cpu)->RES = 0;\n"
11172 #if RISCV64_DEBUG_CALL
11173 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
11180 "return exception;\n"
11220 partInit.
code() = std::string(
"//amomin.d\n")+
11221 "etiss_uint32 exception = 0;\n"
11222 "etiss_uint32 temp = 0;\n"
11223 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
11224 #if RISCV64_Pipeline1
11225 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
11226 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
11227 "etiss_uint32 num_stages = 4;\n"
11228 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
11229 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
11231 #if RISCV64_Pipeline2
11232 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
11233 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
11234 "etiss_uint32 num_stages = 4;\n"
11235 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
11236 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
11239 "etiss_uint64 offs = 0;\n"
11240 "etiss_int64 res1 = 0;\n"
11241 "etiss_uint64 res2 = 0;\n"
11242 "etiss_uint64 choose1 = 0;\n"
11244 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
11245 #if RISCV64_DEBUG_CALL
11246 "printf(\"offs = %#lx\\n\",offs); \n"
11248 "etiss_uint64 MEM_offs;\n"
11249 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
11250 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n"
11251 "etiss_int64 cast_0 = MEM_offs; \n"
11252 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
11254 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
11256 "res1 = (etiss_int64)cast_0;\n"
11257 #if RISCV64_DEBUG_CALL
11258 "printf(\"res1 = %#lx\\n\",res1); \n"
11262 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = res1;\n"
11263 #if RISCV64_DEBUG_CALL
11264 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
11268 "etiss_int64 cast_1 = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"]; \n"
11269 "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n"
11271 "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n"
11273 "etiss_int64 cast_2 = res1; \n"
11274 "if((etiss_int64)((etiss_uint64)cast_2 - 0x8000000000000000) > 0x0)\n"
11276 "cast_2 =0x0 + (etiss_uint64)cast_2 ;\n"
11278 "if((etiss_int64)cast_2 > (etiss_int64)cast_1)\n"
11280 "choose1 = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
11281 #if RISCV64_DEBUG_CALL
11282 "printf(\"choose1 = %#lx\\n\",choose1); \n"
11288 "choose1 = res1;\n"
11289 #if RISCV64_DEBUG_CALL
11290 "printf(\"choose1 = %#lx\\n\",choose1); \n"
11293 "res2 = choose1;\n"
11294 #if RISCV64_DEBUG_CALL
11295 "printf(\"res2 = %#lx\\n\",res2); \n"
11297 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
11298 "MEM_offs = res2;\n"
11299 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n"
11300 #if RISCV64_DEBUG_CALL
11301 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
11303 "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
11305 "((RISCV64*)cpu)->RES = 0;\n"
11306 #if RISCV64_DEBUG_CALL
11307 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
11314 "return exception;\n"
11354 partInit.
code() = std::string(
"//amomax.w\n")+
11355 "etiss_uint32 exception = 0;\n"
11356 "etiss_uint32 temp = 0;\n"
11357 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
11358 #if RISCV64_Pipeline1
11359 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
11360 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
11361 "etiss_uint32 num_stages = 4;\n"
11362 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
11363 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
11365 #if RISCV64_Pipeline2
11366 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
11367 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
11368 "etiss_uint32 num_stages = 4;\n"
11369 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
11370 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
11373 "etiss_uint64 offs = 0;\n"
11374 "etiss_int64 res1 = 0;\n"
11375 "etiss_uint64 res2 = 0;\n"
11376 "etiss_uint64 choose1 = 0;\n"
11378 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
11379 #if RISCV64_DEBUG_CALL
11380 "printf(\"offs = %#lx\\n\",offs); \n"
11382 "etiss_uint32 MEM_offs;\n"
11383 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
11384 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n"
11385 "etiss_int32 cast_0 = MEM_offs; \n"
11386 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
11388 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
11390 "res1 = (etiss_int64)cast_0;\n"
11391 #if RISCV64_DEBUG_CALL
11392 "printf(\"res1 = %#lx\\n\",res1); \n"
11396 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = res1;\n"
11397 #if RISCV64_DEBUG_CALL
11398 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
11402 "etiss_int64 cast_1 = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"]; \n"
11403 "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n"
11405 "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n"
11407 "etiss_int64 cast_2 = res1; \n"
11408 "if((etiss_int64)((etiss_uint64)cast_2 - 0x8000000000000000) > 0x0)\n"
11410 "cast_2 =0x0 + (etiss_uint64)cast_2 ;\n"
11412 "if((etiss_int64)cast_2 < (etiss_int64)cast_1)\n"
11414 "choose1 = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
11415 #if RISCV64_DEBUG_CALL
11416 "printf(\"choose1 = %#lx\\n\",choose1); \n"
11422 "choose1 = res1;\n"
11423 #if RISCV64_DEBUG_CALL
11424 "printf(\"choose1 = %#lx\\n\",choose1); \n"
11427 "res2 = choose1;\n"
11428 #if RISCV64_DEBUG_CALL
11429 "printf(\"res2 = %#lx\\n\",res2); \n"
11431 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
11432 "MEM_offs = res2;\n"
11433 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n"
11434 #if RISCV64_DEBUG_CALL
11435 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
11437 "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
11439 "((RISCV64*)cpu)->RES = 0;\n"
11440 #if RISCV64_DEBUG_CALL
11441 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
11448 "return exception;\n"
11488 partInit.
code() = std::string(
"//amomax.d\n")+
11489 "etiss_uint32 exception = 0;\n"
11490 "etiss_uint32 temp = 0;\n"
11491 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
11492 #if RISCV64_Pipeline1
11493 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
11494 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
11495 "etiss_uint32 num_stages = 4;\n"
11496 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
11497 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
11499 #if RISCV64_Pipeline2
11500 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
11501 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
11502 "etiss_uint32 num_stages = 4;\n"
11503 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
11504 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
11507 "etiss_uint64 offs = 0;\n"
11508 "etiss_int64 res = 0;\n"
11509 "etiss_uint64 res2 = 0;\n"
11510 "etiss_uint64 choose1 = 0;\n"
11512 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
11513 #if RISCV64_DEBUG_CALL
11514 "printf(\"offs = %#lx\\n\",offs); \n"
11516 "etiss_uint64 MEM_offs;\n"
11517 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
11518 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n"
11519 "etiss_int64 cast_0 = MEM_offs; \n"
11520 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
11522 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
11524 "res = (etiss_int64)cast_0;\n"
11525 #if RISCV64_DEBUG_CALL
11526 "printf(\"res = %#lx\\n\",res); \n"
11530 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = res;\n"
11531 #if RISCV64_DEBUG_CALL
11532 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
11536 "etiss_int64 cast_1 = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"]; \n"
11537 "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n"
11539 "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n"
11541 "etiss_int64 cast_2 = res; \n"
11542 "if((etiss_int64)((etiss_uint64)cast_2 - 0x8000000000000000) > 0x0)\n"
11544 "cast_2 =0x0 + (etiss_uint64)cast_2 ;\n"
11546 "if((etiss_int64)cast_2 < (etiss_int64)cast_1)\n"
11548 "choose1 = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
11549 #if RISCV64_DEBUG_CALL
11550 "printf(\"choose1 = %#lx\\n\",choose1); \n"
11557 #if RISCV64_DEBUG_CALL
11558 "printf(\"choose1 = %#lx\\n\",choose1); \n"
11561 "res2 = choose1;\n"
11562 #if RISCV64_DEBUG_CALL
11563 "printf(\"res2 = %#lx\\n\",res2); \n"
11565 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
11566 "MEM_offs = res2;\n"
11567 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n"
11568 #if RISCV64_DEBUG_CALL
11569 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
11571 "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
11573 "((RISCV64*)cpu)->RES = 0;\n"
11574 #if RISCV64_DEBUG_CALL
11575 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
11582 "return exception;\n"
11622 partInit.
code() = std::string(
"//amominu.w\n")+
11623 "etiss_uint32 exception = 0;\n"
11624 "etiss_uint32 temp = 0;\n"
11625 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
11626 #if RISCV64_Pipeline1
11627 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
11628 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
11629 "etiss_uint32 num_stages = 4;\n"
11630 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
11631 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
11633 #if RISCV64_Pipeline2
11634 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
11635 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
11636 "etiss_uint32 num_stages = 4;\n"
11637 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
11638 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
11641 "etiss_uint64 offs = 0;\n"
11642 "etiss_int64 res1 = 0;\n"
11643 "etiss_uint64 res2 = 0;\n"
11644 "etiss_uint64 choose1 = 0;\n"
11646 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
11647 #if RISCV64_DEBUG_CALL
11648 "printf(\"offs = %#lx\\n\",offs); \n"
11650 "etiss_uint32 MEM_offs;\n"
11651 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
11652 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n"
11653 "etiss_int32 cast_0 = MEM_offs; \n"
11654 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
11656 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
11658 "res1 = (etiss_int64)cast_0;\n"
11659 #if RISCV64_DEBUG_CALL
11660 "printf(\"res1 = %#lx\\n\",res1); \n"
11664 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = res1;\n"
11665 #if RISCV64_DEBUG_CALL
11666 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
11670 "if(res1 > *((RISCV64*)cpu)->X[" +
toString(rs2) +
"])\n"
11672 "choose1 = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
11673 #if RISCV64_DEBUG_CALL
11674 "printf(\"choose1 = %#lx\\n\",choose1); \n"
11680 "choose1 = res1;\n"
11681 #if RISCV64_DEBUG_CALL
11682 "printf(\"choose1 = %#lx\\n\",choose1); \n"
11685 "res2 = choose1;\n"
11686 #if RISCV64_DEBUG_CALL
11687 "printf(\"res2 = %#lx\\n\",res2); \n"
11689 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
11690 "MEM_offs = res2;\n"
11691 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n"
11692 #if RISCV64_DEBUG_CALL
11693 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
11695 "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
11697 "((RISCV64*)cpu)->RES = 0;\n"
11698 #if RISCV64_DEBUG_CALL
11699 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
11706 "return exception;\n"
11746 partInit.
code() = std::string(
"//amominu.d\n")+
11747 "etiss_uint32 exception = 0;\n"
11748 "etiss_uint32 temp = 0;\n"
11749 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
11750 #if RISCV64_Pipeline1
11751 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
11752 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
11753 "etiss_uint32 num_stages = 4;\n"
11754 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
11755 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
11757 #if RISCV64_Pipeline2
11758 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
11759 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
11760 "etiss_uint32 num_stages = 4;\n"
11761 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
11762 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
11765 "etiss_uint64 offs = 0;\n"
11766 "etiss_int64 res = 0;\n"
11767 "etiss_uint64 res2 = 0;\n"
11768 "etiss_uint64 choose1 = 0;\n"
11770 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
11771 #if RISCV64_DEBUG_CALL
11772 "printf(\"offs = %#lx\\n\",offs); \n"
11774 "etiss_uint64 MEM_offs;\n"
11775 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
11776 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n"
11777 "etiss_int64 cast_0 = MEM_offs; \n"
11778 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
11780 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
11782 "res = (etiss_int64)cast_0;\n"
11783 #if RISCV64_DEBUG_CALL
11784 "printf(\"res = %#lx\\n\",res); \n"
11788 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = res;\n"
11789 #if RISCV64_DEBUG_CALL
11790 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
11794 "if(res > *((RISCV64*)cpu)->X[" +
toString(rs2) +
"])\n"
11796 "choose1 = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
11797 #if RISCV64_DEBUG_CALL
11798 "printf(\"choose1 = %#lx\\n\",choose1); \n"
11805 #if RISCV64_DEBUG_CALL
11806 "printf(\"choose1 = %#lx\\n\",choose1); \n"
11809 "res2 = choose1;\n"
11810 #if RISCV64_DEBUG_CALL
11811 "printf(\"res2 = %#lx\\n\",res2); \n"
11813 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
11814 "MEM_offs = res2;\n"
11815 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n"
11816 #if RISCV64_DEBUG_CALL
11817 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
11819 "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
11821 "((RISCV64*)cpu)->RES = 0;\n"
11822 #if RISCV64_DEBUG_CALL
11823 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
11830 "return exception;\n"
11870 partInit.
code() = std::string(
"//amomaxu.w\n")+
11871 "etiss_uint32 exception = 0;\n"
11872 "etiss_uint32 temp = 0;\n"
11873 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
11874 #if RISCV64_Pipeline1
11875 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
11876 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
11877 "etiss_uint32 num_stages = 4;\n"
11878 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
11879 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
11881 #if RISCV64_Pipeline2
11882 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
11883 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
11884 "etiss_uint32 num_stages = 4;\n"
11885 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
11886 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
11889 "etiss_uint64 offs = 0;\n"
11890 "etiss_int64 res1 = 0;\n"
11891 "etiss_uint64 res2 = 0;\n"
11892 "etiss_uint64 choose1 = 0;\n"
11894 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
11895 #if RISCV64_DEBUG_CALL
11896 "printf(\"offs = %#lx\\n\",offs); \n"
11898 "etiss_uint32 MEM_offs;\n"
11899 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
11900 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n"
11901 "etiss_int32 cast_0 = MEM_offs; \n"
11902 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
11904 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
11906 "res1 = (etiss_int64)cast_0;\n"
11907 #if RISCV64_DEBUG_CALL
11908 "printf(\"res1 = %#lx\\n\",res1); \n"
11912 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = res1;\n"
11913 #if RISCV64_DEBUG_CALL
11914 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
11918 "if(res1 < *((RISCV64*)cpu)->X[" +
toString(rs2) +
"])\n"
11920 "choose1 = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
11921 #if RISCV64_DEBUG_CALL
11922 "printf(\"choose1 = %#lx\\n\",choose1); \n"
11928 "choose1 = res1;\n"
11929 #if RISCV64_DEBUG_CALL
11930 "printf(\"choose1 = %#lx\\n\",choose1); \n"
11933 "res2 = choose1;\n"
11934 #if RISCV64_DEBUG_CALL
11935 "printf(\"res2 = %#lx\\n\",res2); \n"
11937 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
11938 "MEM_offs = res2;\n"
11939 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n"
11940 #if RISCV64_DEBUG_CALL
11941 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
11943 "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
11945 "((RISCV64*)cpu)->RES = 0;\n"
11946 #if RISCV64_DEBUG_CALL
11947 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
11954 "return exception;\n"
11994 partInit.
code() = std::string(
"//amomaxu.d\n")+
11995 "etiss_uint32 exception = 0;\n"
11996 "etiss_uint32 temp = 0;\n"
11997 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
11998 #if RISCV64_Pipeline1
11999 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
12000 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
12001 "etiss_uint32 num_stages = 4;\n"
12002 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
12003 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
12005 #if RISCV64_Pipeline2
12006 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
12007 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
12008 "etiss_uint32 num_stages = 4;\n"
12009 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
12010 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
12013 "etiss_uint64 offs = 0;\n"
12014 "etiss_int64 res1 = 0;\n"
12015 "etiss_uint64 res2 = 0;\n"
12016 "etiss_uint64 choose1 = 0;\n"
12018 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
12019 #if RISCV64_DEBUG_CALL
12020 "printf(\"offs = %#lx\\n\",offs); \n"
12022 "etiss_uint64 MEM_offs;\n"
12023 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
12024 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n"
12025 "etiss_int64 cast_0 = MEM_offs; \n"
12026 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
12028 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
12030 "res1 = (etiss_int64)cast_0;\n"
12031 #if RISCV64_DEBUG_CALL
12032 "printf(\"res1 = %#lx\\n\",res1); \n"
12036 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = res1;\n"
12037 #if RISCV64_DEBUG_CALL
12038 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
12042 "if(res1 < *((RISCV64*)cpu)->X[" +
toString(rs2) +
"])\n"
12044 "choose1 = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
12045 #if RISCV64_DEBUG_CALL
12046 "printf(\"choose1 = %#lx\\n\",choose1); \n"
12052 "choose1 = res1;\n"
12053 #if RISCV64_DEBUG_CALL
12054 "printf(\"choose1 = %#lx\\n\",choose1); \n"
12057 "res2 = choose1;\n"
12058 #if RISCV64_DEBUG_CALL
12059 "printf(\"res2 = %#lx\\n\",res2); \n"
12061 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
12062 "MEM_offs = res2;\n"
12063 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n"
12064 #if RISCV64_DEBUG_CALL
12065 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
12067 "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
12069 "((RISCV64*)cpu)->RES = 0;\n"
12070 #if RISCV64_DEBUG_CALL
12071 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
12078 "return exception;\n"
12112 partInit.
code() = std::string(
"//fsub.s\n")+
12113 "etiss_uint32 temp = 0;\n"
12114 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
12115 #if RISCV64_Pipeline1
12116 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
12117 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
12118 "etiss_uint32 num_stages = 4;\n"
12119 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
12120 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
12122 #if RISCV64_Pipeline2
12123 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
12124 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
12125 "etiss_uint32 num_stages = 4;\n"
12126 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
12127 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
12130 "etiss_uint32 res = 0;\n"
12131 "etiss_int64 upper = 0;\n"
12132 "etiss_uint32 flags = 0;\n"
12133 "etiss_uint32 frs1 = 0;\n"
12134 "etiss_uint32 choose1 = 0;\n"
12135 "etiss_uint32 frs2 = 0;\n"
12141 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
12142 #if RISCV64_DEBUG_CALL
12143 "printf(\"choose1 = %#x\\n\",choose1); \n"
12149 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
12150 #if RISCV64_DEBUG_CALL
12151 "printf(\"choose1 = %#x\\n\",choose1); \n"
12154 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = fsub_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"], ((RISCV64*)cpu)->F[" +
toString(rs2) +
"], choose1);\n"
12155 #if RISCV64_DEBUG_CALL
12156 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
12162 "frs1 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"]);\n"
12163 #if RISCV64_DEBUG_CALL
12164 "printf(\"frs1 = %#x\\n\",frs1); \n"
12166 "frs2 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs2) +
"]);\n"
12167 #if RISCV64_DEBUG_CALL
12168 "printf(\"frs2 = %#x\\n\",frs2); \n"
12172 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
12173 #if RISCV64_DEBUG_CALL
12174 "printf(\"choose1 = %#x\\n\",choose1); \n"
12180 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
12181 #if RISCV64_DEBUG_CALL
12182 "printf(\"choose1 = %#x\\n\",choose1); \n"
12185 "res = fsub_s(frs1, frs2, choose1);\n"
12186 #if RISCV64_DEBUG_CALL
12187 "printf(\"res = %#x\\n\",res); \n"
12190 #if RISCV64_DEBUG_CALL
12191 "printf(\"upper = %#lx\\n\",upper); \n"
12193 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 32) | (etiss_uint64)res);\n"
12194 #if RISCV64_DEBUG_CALL
12195 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
12198 "flags = fget_flags();\n"
12199 #if RISCV64_DEBUG_CALL
12200 "printf(\"flags = %#x\\n\",flags); \n"
12202 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
12203 #if RISCV64_DEBUG_CALL
12204 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
12242 partInit.
code() = std::string(
"//fdiv.s\n")+
12243 "etiss_uint32 temp = 0;\n"
12244 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
12245 #if RISCV64_Pipeline1
12246 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
12247 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
12248 "etiss_uint32 num_stages = 4;\n"
12249 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
12250 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
12252 #if RISCV64_Pipeline2
12253 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
12254 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
12255 "etiss_uint32 num_stages = 4;\n"
12256 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
12257 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
12260 "etiss_uint32 res = 0;\n"
12261 "etiss_int64 upper = 0;\n"
12262 "etiss_uint32 flags = 0;\n"
12263 "etiss_uint32 frs1 = 0;\n"
12264 "etiss_uint32 choose1 = 0;\n"
12265 "etiss_uint32 frs2 = 0;\n"
12271 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
12272 #if RISCV64_DEBUG_CALL
12273 "printf(\"choose1 = %#x\\n\",choose1); \n"
12279 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
12280 #if RISCV64_DEBUG_CALL
12281 "printf(\"choose1 = %#x\\n\",choose1); \n"
12284 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = fdiv_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"], ((RISCV64*)cpu)->F[" +
toString(rs2) +
"], choose1);\n"
12285 #if RISCV64_DEBUG_CALL
12286 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
12292 "frs1 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"]);\n"
12293 #if RISCV64_DEBUG_CALL
12294 "printf(\"frs1 = %#x\\n\",frs1); \n"
12296 "frs2 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs2) +
"]);\n"
12297 #if RISCV64_DEBUG_CALL
12298 "printf(\"frs2 = %#x\\n\",frs2); \n"
12302 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
12303 #if RISCV64_DEBUG_CALL
12304 "printf(\"choose1 = %#x\\n\",choose1); \n"
12310 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
12311 #if RISCV64_DEBUG_CALL
12312 "printf(\"choose1 = %#x\\n\",choose1); \n"
12315 "res = fdiv_s(frs1, frs2, choose1);\n"
12316 #if RISCV64_DEBUG_CALL
12317 "printf(\"res = %#x\\n\",res); \n"
12320 #if RISCV64_DEBUG_CALL
12321 "printf(\"upper = %#lx\\n\",upper); \n"
12323 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 32) | (etiss_uint64)res);\n"
12324 #if RISCV64_DEBUG_CALL
12325 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
12328 "flags = fget_flags();\n"
12329 #if RISCV64_DEBUG_CALL
12330 "printf(\"flags = %#x\\n\",flags); \n"
12332 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
12333 #if RISCV64_DEBUG_CALL
12334 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
12368 partInit.
code() = std::string(
"//fsqrt.s\n")+
12369 "etiss_uint32 temp = 0;\n"
12370 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
12371 #if RISCV64_Pipeline1
12372 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
12373 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
12374 "etiss_uint32 num_stages = 4;\n"
12375 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
12376 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
12378 #if RISCV64_Pipeline2
12379 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
12380 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
12381 "etiss_uint32 num_stages = 4;\n"
12382 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
12383 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
12386 "etiss_uint32 res = 0;\n"
12387 "etiss_int64 upper = 0;\n"
12388 "etiss_uint32 flags = 0;\n"
12389 "etiss_uint32 frs1 = 0;\n"
12390 "etiss_uint32 choose1 = 0;\n"
12396 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
12397 #if RISCV64_DEBUG_CALL
12398 "printf(\"choose1 = %#x\\n\",choose1); \n"
12404 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
12405 #if RISCV64_DEBUG_CALL
12406 "printf(\"choose1 = %#x\\n\",choose1); \n"
12409 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = fsqrt_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"], choose1);\n"
12410 #if RISCV64_DEBUG_CALL
12411 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
12417 "frs1 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"]);\n"
12418 #if RISCV64_DEBUG_CALL
12419 "printf(\"frs1 = %#x\\n\",frs1); \n"
12423 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
12424 #if RISCV64_DEBUG_CALL
12425 "printf(\"choose1 = %#x\\n\",choose1); \n"
12431 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
12432 #if RISCV64_DEBUG_CALL
12433 "printf(\"choose1 = %#x\\n\",choose1); \n"
12436 "res = fsqrt_s(frs1, choose1);\n"
12437 #if RISCV64_DEBUG_CALL
12438 "printf(\"res = %#x\\n\",res); \n"
12441 #if RISCV64_DEBUG_CALL
12442 "printf(\"upper = %#lx\\n\",upper); \n"
12444 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 32) | (etiss_uint64)res);\n"
12445 #if RISCV64_DEBUG_CALL
12446 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
12449 "flags = fget_flags();\n"
12450 #if RISCV64_DEBUG_CALL
12451 "printf(\"flags = %#x\\n\",flags); \n"
12453 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
12454 #if RISCV64_DEBUG_CALL
12455 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
12491 partInit.
code() = std::string(
"//fsgnj.s\n")+
12492 "etiss_uint32 temp = 0;\n"
12493 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
12494 #if RISCV64_Pipeline1
12495 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
12496 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
12497 "etiss_uint32 num_stages = 4;\n"
12498 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
12499 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
12501 #if RISCV64_Pipeline2
12502 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
12503 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
12504 "etiss_uint32 num_stages = 4;\n"
12505 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
12506 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
12509 "etiss_uint32 res = 0;\n"
12510 "etiss_int64 upper = 0;\n"
12511 "etiss_uint32 frs1 = 0;\n"
12512 "etiss_uint32 frs2 = 0;\n"
12516 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 2147483647) | (((RISCV64*)cpu)->F[" +
toString(rs2) +
"] & -2147483648));\n"
12517 #if RISCV64_DEBUG_CALL
12518 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
12524 "frs1 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"]);\n"
12525 #if RISCV64_DEBUG_CALL
12526 "printf(\"frs1 = %#x\\n\",frs1); \n"
12528 "frs2 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs2) +
"]);\n"
12529 #if RISCV64_DEBUG_CALL
12530 "printf(\"frs2 = %#x\\n\",frs2); \n"
12532 "res = ((frs1 & 2147483647) | (frs2 & -2147483648));\n"
12533 #if RISCV64_DEBUG_CALL
12534 "printf(\"res = %#x\\n\",res); \n"
12537 #if RISCV64_DEBUG_CALL
12538 "printf(\"upper = %#lx\\n\",upper); \n"
12540 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 32) | (etiss_uint64)res);\n"
12541 #if RISCV64_DEBUG_CALL
12542 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
12579 partInit.
code() = std::string(
"//fsgnjn.s\n")+
12580 "etiss_uint32 temp = 0;\n"
12581 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
12582 #if RISCV64_Pipeline1
12583 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
12584 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
12585 "etiss_uint32 num_stages = 4;\n"
12586 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
12587 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
12589 #if RISCV64_Pipeline2
12590 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
12591 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
12592 "etiss_uint32 num_stages = 4;\n"
12593 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
12594 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
12597 "etiss_uint32 res = 0;\n"
12598 "etiss_int64 upper = 0;\n"
12599 "etiss_uint32 frs1 = 0;\n"
12600 "etiss_uint32 frs2 = 0;\n"
12604 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 2147483647) | (~((RISCV64*)cpu)->F[" +
toString(rs2) +
"] & -2147483648))&0xffffffffffffffff;\n"
12605 #if RISCV64_DEBUG_CALL
12606 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
12612 "frs1 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"]);\n"
12613 #if RISCV64_DEBUG_CALL
12614 "printf(\"frs1 = %#x\\n\",frs1); \n"
12616 "frs2 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs2) +
"]);\n"
12617 #if RISCV64_DEBUG_CALL
12618 "printf(\"frs2 = %#x\\n\",frs2); \n"
12620 "res = ((frs1 & 2147483647) | (~frs2 & -2147483648))&0xffffffff;\n"
12621 #if RISCV64_DEBUG_CALL
12622 "printf(\"res = %#x\\n\",res); \n"
12625 #if RISCV64_DEBUG_CALL
12626 "printf(\"upper = %#lx\\n\",upper); \n"
12628 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 32) | (etiss_uint64)res);\n"
12629 #if RISCV64_DEBUG_CALL
12630 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
12667 partInit.
code() = std::string(
"//fsgnjx.s\n")+
12668 "etiss_uint32 temp = 0;\n"
12669 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
12670 #if RISCV64_Pipeline1
12671 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
12672 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
12673 "etiss_uint32 num_stages = 4;\n"
12674 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
12675 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
12677 #if RISCV64_Pipeline2
12678 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
12679 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
12680 "etiss_uint32 num_stages = 4;\n"
12681 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
12682 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
12685 "etiss_uint32 res = 0;\n"
12686 "etiss_int64 upper = 0;\n"
12687 "etiss_uint32 frs1 = 0;\n"
12688 "etiss_uint32 frs2 = 0;\n"
12692 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = (((RISCV64*)cpu)->F[" +
toString(rs1) +
"] ^ (((RISCV64*)cpu)->F[" +
toString(rs2) +
"] & -2147483648));\n"
12693 #if RISCV64_DEBUG_CALL
12694 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
12700 "frs1 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"]);\n"
12701 #if RISCV64_DEBUG_CALL
12702 "printf(\"frs1 = %#x\\n\",frs1); \n"
12704 "frs2 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs2) +
"]);\n"
12705 #if RISCV64_DEBUG_CALL
12706 "printf(\"frs2 = %#x\\n\",frs2); \n"
12708 "res = (frs1 ^ (frs2 & -2147483648));\n"
12709 #if RISCV64_DEBUG_CALL
12710 "printf(\"res = %#x\\n\",res); \n"
12713 #if RISCV64_DEBUG_CALL
12714 "printf(\"upper = %#lx\\n\",upper); \n"
12716 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 32) | (etiss_uint64)res);\n"
12717 #if RISCV64_DEBUG_CALL
12718 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
12753 partInit.
code() = std::string(
"//fmin.s\n")+
12754 "etiss_uint32 temp = 0;\n"
12755 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
12756 #if RISCV64_Pipeline1
12757 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
12758 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
12759 "etiss_uint32 num_stages = 4;\n"
12760 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
12761 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
12763 #if RISCV64_Pipeline2
12764 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
12765 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
12766 "etiss_uint32 num_stages = 4;\n"
12767 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
12768 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
12771 "etiss_uint32 res = 0;\n"
12772 "etiss_int64 upper = 0;\n"
12773 "etiss_uint32 flags = 0;\n"
12774 "etiss_uint32 frs1 = 0;\n"
12775 "etiss_uint32 frs2 = 0;\n"
12779 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = fsel_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"], ((RISCV64*)cpu)->F[" +
toString(rs2) +
"], (etiss_uint32)0);\n"
12780 #if RISCV64_DEBUG_CALL
12781 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
12787 "frs1 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"]);\n"
12788 #if RISCV64_DEBUG_CALL
12789 "printf(\"frs1 = %#x\\n\",frs1); \n"
12791 "frs2 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs2) +
"]);\n"
12792 #if RISCV64_DEBUG_CALL
12793 "printf(\"frs2 = %#x\\n\",frs2); \n"
12795 "res = fsel_s(frs1, frs2, (etiss_uint32)0);\n"
12796 #if RISCV64_DEBUG_CALL
12797 "printf(\"res = %#x\\n\",res); \n"
12800 #if RISCV64_DEBUG_CALL
12801 "printf(\"upper = %#lx\\n\",upper); \n"
12803 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 32) | (etiss_uint64)res);\n"
12804 #if RISCV64_DEBUG_CALL
12805 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
12808 "flags = fget_flags();\n"
12809 #if RISCV64_DEBUG_CALL
12810 "printf(\"flags = %#x\\n\",flags); \n"
12812 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
12813 #if RISCV64_DEBUG_CALL
12814 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
12848 partInit.
code() = std::string(
"//fmax.s\n")+
12849 "etiss_uint32 temp = 0;\n"
12850 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
12851 #if RISCV64_Pipeline1
12852 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
12853 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
12854 "etiss_uint32 num_stages = 4;\n"
12855 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
12856 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
12858 #if RISCV64_Pipeline2
12859 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
12860 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
12861 "etiss_uint32 num_stages = 4;\n"
12862 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
12863 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
12866 "etiss_uint32 res = 0;\n"
12867 "etiss_int64 upper = 0;\n"
12868 "etiss_uint32 flags = 0;\n"
12869 "etiss_uint32 frs1 = 0;\n"
12870 "etiss_uint32 frs2 = 0;\n"
12874 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = fsel_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"], ((RISCV64*)cpu)->F[" +
toString(rs2) +
"], (etiss_uint32)1);\n"
12875 #if RISCV64_DEBUG_CALL
12876 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
12882 "frs1 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"]);\n"
12883 #if RISCV64_DEBUG_CALL
12884 "printf(\"frs1 = %#x\\n\",frs1); \n"
12886 "frs2 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs2) +
"]);\n"
12887 #if RISCV64_DEBUG_CALL
12888 "printf(\"frs2 = %#x\\n\",frs2); \n"
12890 "res = fsel_s(frs1, frs2, (etiss_uint32)1);\n"
12891 #if RISCV64_DEBUG_CALL
12892 "printf(\"res = %#x\\n\",res); \n"
12895 #if RISCV64_DEBUG_CALL
12896 "printf(\"upper = %#lx\\n\",upper); \n"
12898 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 32) | (etiss_uint64)res);\n"
12899 #if RISCV64_DEBUG_CALL
12900 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
12903 "flags = fget_flags();\n"
12904 #if RISCV64_DEBUG_CALL
12905 "printf(\"flags = %#x\\n\",flags); \n"
12907 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
12908 #if RISCV64_DEBUG_CALL
12909 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
12943 partInit.
code() = std::string(
"//fcvt.w.s\n")+
12944 "etiss_uint32 temp = 0;\n"
12945 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
12946 #if RISCV64_Pipeline1
12947 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
12948 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
12949 "etiss_uint32 num_stages = 4;\n"
12950 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
12951 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
12953 #if RISCV64_Pipeline2
12954 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
12955 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
12956 "etiss_uint32 num_stages = 4;\n"
12957 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
12958 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
12961 "etiss_uint32 flags = 0;\n"
12962 "etiss_uint32 frs1 = 0;\n"
12966 "etiss_int32 cast_0 = fcvt_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"], (etiss_uint32)0, (" +
toString(rm) +
" & 0xff)); \n"
12967 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
12969 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
12971 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
12972 #if RISCV64_DEBUG_CALL
12973 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
12979 "frs1 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"]);\n"
12980 #if RISCV64_DEBUG_CALL
12981 "printf(\"frs1 = %#x\\n\",frs1); \n"
12983 "etiss_int32 cast_1 = fcvt_s(frs1, (etiss_uint32)0, (" +
toString(rm) +
" & 0xff)); \n"
12984 "if((etiss_int32)((etiss_uint32)cast_1 - 0x80000000) > 0x0)\n"
12986 "cast_1 =0x0 + (etiss_uint32)cast_1 ;\n"
12988 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_1;\n"
12989 #if RISCV64_DEBUG_CALL
12990 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
12993 "flags = fget_flags();\n"
12994 #if RISCV64_DEBUG_CALL
12995 "printf(\"flags = %#x\\n\",flags); \n"
12997 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
12998 #if RISCV64_DEBUG_CALL
12999 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
13033 partInit.
code() = std::string(
"//fcvt.wu.s\n")+
13034 "etiss_uint32 temp = 0;\n"
13035 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
13036 #if RISCV64_Pipeline1
13037 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13038 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13039 "etiss_uint32 num_stages = 4;\n"
13040 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13041 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13043 #if RISCV64_Pipeline2
13044 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13045 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13046 "etiss_uint32 num_stages = 4;\n"
13047 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13048 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13051 "etiss_uint32 flags = 0;\n"
13052 "etiss_uint32 frs1 = 0;\n"
13056 "etiss_int32 cast_0 = fcvt_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"], (etiss_uint32)1, (" +
toString(rm) +
" & 0xff)); \n"
13057 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
13059 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
13061 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
13062 #if RISCV64_DEBUG_CALL
13063 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
13069 "frs1 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"]);\n"
13070 #if RISCV64_DEBUG_CALL
13071 "printf(\"frs1 = %#x\\n\",frs1); \n"
13073 "etiss_int32 cast_1 = fcvt_s(frs1, (etiss_uint32)1, (" +
toString(rm) +
" & 0xff)); \n"
13074 "if((etiss_int32)((etiss_uint32)cast_1 - 0x80000000) > 0x0)\n"
13076 "cast_1 =0x0 + (etiss_uint32)cast_1 ;\n"
13078 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_1;\n"
13079 #if RISCV64_DEBUG_CALL
13080 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
13083 "flags = fget_flags();\n"
13084 #if RISCV64_DEBUG_CALL
13085 "printf(\"flags = %#x\\n\",flags); \n"
13087 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
13088 #if RISCV64_DEBUG_CALL
13089 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
13123 partInit.
code() = std::string(
"//fcvt.l.s\n")+
13124 "etiss_uint32 temp = 0;\n"
13125 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
13126 #if RISCV64_Pipeline1
13127 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13128 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13129 "etiss_uint32 num_stages = 4;\n"
13130 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13131 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13133 #if RISCV64_Pipeline2
13134 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13135 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13136 "etiss_uint32 num_stages = 4;\n"
13137 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13138 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13141 "etiss_uint64 res = 0;\n"
13142 "etiss_uint32 flags = 0;\n"
13144 "res = fcvt_32_64(unbox_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"]), (etiss_uint32)0, (" +
toString(rm) +
" & 0xff));\n"
13145 #if RISCV64_DEBUG_CALL
13146 "printf(\"res = %#lx\\n\",res); \n"
13148 "etiss_int64 cast_0 = res; \n"
13149 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
13151 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
13153 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
13154 #if RISCV64_DEBUG_CALL
13155 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
13157 "flags = fget_flags();\n"
13158 #if RISCV64_DEBUG_CALL
13159 "printf(\"flags = %#x\\n\",flags); \n"
13161 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
13162 #if RISCV64_DEBUG_CALL
13163 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
13197 partInit.
code() = std::string(
"//fcvt.lu.s\n")+
13198 "etiss_uint32 temp = 0;\n"
13199 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
13200 #if RISCV64_Pipeline1
13201 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13202 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13203 "etiss_uint32 num_stages = 4;\n"
13204 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13205 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13207 #if RISCV64_Pipeline2
13208 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13209 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13210 "etiss_uint32 num_stages = 4;\n"
13211 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13212 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13215 "etiss_uint64 res = 0;\n"
13216 "etiss_uint32 flags = 0;\n"
13218 "res = fcvt_32_64(unbox_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"]), (etiss_uint32)1, (" +
toString(rm) +
" & 0xff));\n"
13219 #if RISCV64_DEBUG_CALL
13220 "printf(\"res = %#lx\\n\",res); \n"
13222 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_uint64)res;\n"
13223 #if RISCV64_DEBUG_CALL
13224 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
13226 "flags = fget_flags();\n"
13227 #if RISCV64_DEBUG_CALL
13228 "printf(\"flags = %#x\\n\",flags); \n"
13230 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
13231 #if RISCV64_DEBUG_CALL
13232 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
13266 partInit.
code() = std::string(
"//feq.s\n")+
13267 "etiss_uint32 temp = 0;\n"
13268 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
13269 #if RISCV64_Pipeline1
13270 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13271 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13272 "etiss_uint32 num_stages = 4;\n"
13273 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13274 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13276 #if RISCV64_Pipeline2
13277 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13278 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13279 "etiss_uint32 num_stages = 4;\n"
13280 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13281 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13284 "etiss_uint32 flags = 0;\n"
13285 "etiss_uint32 frs1 = 0;\n"
13286 "etiss_uint32 frs2 = 0;\n"
13290 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_uint64)fcmp_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"], ((RISCV64*)cpu)->F[" +
toString(rs2) +
"], (etiss_uint32)0);\n"
13291 #if RISCV64_DEBUG_CALL
13292 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
13298 "frs1 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"]);\n"
13299 #if RISCV64_DEBUG_CALL
13300 "printf(\"frs1 = %#x\\n\",frs1); \n"
13302 "frs2 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs2) +
"]);\n"
13303 #if RISCV64_DEBUG_CALL
13304 "printf(\"frs2 = %#x\\n\",frs2); \n"
13306 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_uint64)fcmp_s(frs1, frs2, (etiss_uint32)0);\n"
13307 #if RISCV64_DEBUG_CALL
13308 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
13311 "flags = fget_flags();\n"
13312 #if RISCV64_DEBUG_CALL
13313 "printf(\"flags = %#x\\n\",flags); \n"
13315 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
13316 #if RISCV64_DEBUG_CALL
13317 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
13351 partInit.
code() = std::string(
"//flt.s\n")+
13352 "etiss_uint32 temp = 0;\n"
13353 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
13354 #if RISCV64_Pipeline1
13355 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13356 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13357 "etiss_uint32 num_stages = 4;\n"
13358 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13359 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13361 #if RISCV64_Pipeline2
13362 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13363 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13364 "etiss_uint32 num_stages = 4;\n"
13365 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13366 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13369 "etiss_uint32 flags = 0;\n"
13370 "etiss_uint32 frs1 = 0;\n"
13371 "etiss_uint32 frs2 = 0;\n"
13375 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_uint64)fcmp_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"], ((RISCV64*)cpu)->F[" +
toString(rs2) +
"], (etiss_uint32)2);\n"
13376 #if RISCV64_DEBUG_CALL
13377 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
13383 "frs1 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"]);\n"
13384 #if RISCV64_DEBUG_CALL
13385 "printf(\"frs1 = %#x\\n\",frs1); \n"
13387 "frs2 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs2) +
"]);\n"
13388 #if RISCV64_DEBUG_CALL
13389 "printf(\"frs2 = %#x\\n\",frs2); \n"
13391 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_uint64)fcmp_s(frs1, frs2, (etiss_uint32)2);\n"
13392 #if RISCV64_DEBUG_CALL
13393 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
13396 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = fcmp_s((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffff), (((RISCV64*)cpu)->F[" +
toString(rs2) +
"] & 0xffffffff), (etiss_uint32)2);\n"
13397 #if RISCV64_DEBUG_CALL
13398 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
13400 "flags = fget_flags();\n"
13401 #if RISCV64_DEBUG_CALL
13402 "printf(\"flags = %#x\\n\",flags); \n"
13404 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
13405 #if RISCV64_DEBUG_CALL
13406 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
13440 partInit.
code() = std::string(
"//fle.s\n")+
13441 "etiss_uint32 temp = 0;\n"
13442 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
13443 #if RISCV64_Pipeline1
13444 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13445 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13446 "etiss_uint32 num_stages = 4;\n"
13447 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13448 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13450 #if RISCV64_Pipeline2
13451 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13452 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13453 "etiss_uint32 num_stages = 4;\n"
13454 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13455 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13458 "etiss_uint32 flags = 0;\n"
13459 "etiss_uint32 frs1 = 0;\n"
13460 "etiss_uint32 frs2 = 0;\n"
13464 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_uint64)fcmp_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"], ((RISCV64*)cpu)->F[" +
toString(rs2) +
"], (etiss_uint32)1);\n"
13465 #if RISCV64_DEBUG_CALL
13466 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
13472 "frs1 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"]);\n"
13473 #if RISCV64_DEBUG_CALL
13474 "printf(\"frs1 = %#x\\n\",frs1); \n"
13476 "frs2 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs2) +
"]);\n"
13477 #if RISCV64_DEBUG_CALL
13478 "printf(\"frs2 = %#x\\n\",frs2); \n"
13480 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_uint64)fcmp_s(frs1, frs2, (etiss_uint32)1);\n"
13481 #if RISCV64_DEBUG_CALL
13482 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
13485 "flags = fget_flags();\n"
13486 #if RISCV64_DEBUG_CALL
13487 "printf(\"flags = %#x\\n\",flags); \n"
13489 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
13490 #if RISCV64_DEBUG_CALL
13491 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
13521 partInit.
code() = std::string(
"//fclass.s\n")+
13522 "etiss_uint32 temp = 0;\n"
13523 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
13524 #if RISCV64_Pipeline1
13525 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13526 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13527 "etiss_uint32 num_stages = 4;\n"
13528 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13529 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13531 #if RISCV64_Pipeline2
13532 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13533 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13534 "etiss_uint32 num_stages = 4;\n"
13535 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13536 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13540 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = fclass_s(unbox_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"]));\n"
13541 #if RISCV64_DEBUG_CALL
13542 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
13573 partInit.
code() = std::string(
"//fmv.x.w\n")+
13574 "etiss_uint32 temp = 0;\n"
13575 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
13576 #if RISCV64_Pipeline1
13577 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13578 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13579 "etiss_uint32 num_stages = 4;\n"
13580 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13581 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13583 #if RISCV64_Pipeline2
13584 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13585 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13586 "etiss_uint32 num_stages = 4;\n"
13587 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13588 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13592 "etiss_int64 cast_0 = (((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffff); \n"
13593 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
13595 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
13597 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
13598 #if RISCV64_DEBUG_CALL
13599 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
13633 partInit.
code() = std::string(
"//fcvt.s.w\n")+
13634 "etiss_uint32 temp = 0;\n"
13635 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
13636 #if RISCV64_Pipeline1
13637 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13638 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13639 "etiss_uint32 num_stages = 4;\n"
13640 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13641 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13643 #if RISCV64_Pipeline2
13644 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13645 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13646 "etiss_uint32 num_stages = 4;\n"
13647 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13648 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13651 "etiss_uint32 res = 0;\n"
13652 "etiss_int64 upper = 0;\n"
13656 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = fcvt_s((*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff), (etiss_uint32)2, (" +
toString(rm) +
" & 0xff));\n"
13657 #if RISCV64_DEBUG_CALL
13658 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
13664 "res = fcvt_s((*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff), (etiss_uint32)2, (" +
toString(rm) +
" & 0xff));\n"
13665 #if RISCV64_DEBUG_CALL
13666 "printf(\"res = %#x\\n\",res); \n"
13669 #if RISCV64_DEBUG_CALL
13670 "printf(\"upper = %#lx\\n\",upper); \n"
13672 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 32) | (etiss_uint64)res);\n"
13673 #if RISCV64_DEBUG_CALL
13674 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
13709 partInit.
code() = std::string(
"//fcvt.s.wu\n")+
13710 "etiss_uint32 temp = 0;\n"
13711 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
13712 #if RISCV64_Pipeline1
13713 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13714 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13715 "etiss_uint32 num_stages = 4;\n"
13716 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13717 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13719 #if RISCV64_Pipeline2
13720 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13721 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13722 "etiss_uint32 num_stages = 4;\n"
13723 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13724 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13727 "etiss_uint32 res = 0;\n"
13728 "etiss_int64 upper = 0;\n"
13732 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = fcvt_s((*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff), (etiss_uint32)3, (" +
toString(rm) +
" & 0xff));\n"
13733 #if RISCV64_DEBUG_CALL
13734 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
13740 "res = fcvt_s((*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff), (etiss_uint32)3, (" +
toString(rm) +
" & 0xff));\n"
13741 #if RISCV64_DEBUG_CALL
13742 "printf(\"res = %#x\\n\",res); \n"
13745 #if RISCV64_DEBUG_CALL
13746 "printf(\"upper = %#lx\\n\",upper); \n"
13748 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 32) | (etiss_uint64)res);\n"
13749 #if RISCV64_DEBUG_CALL
13750 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
13785 partInit.
code() = std::string(
"//fcvt.s.l\n")+
13786 "etiss_uint32 temp = 0;\n"
13787 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
13788 #if RISCV64_Pipeline1
13789 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13790 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13791 "etiss_uint32 num_stages = 4;\n"
13792 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13793 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13795 #if RISCV64_Pipeline2
13796 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13797 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13798 "etiss_uint32 num_stages = 4;\n"
13799 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13800 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13803 "etiss_uint32 res = 0;\n"
13804 "etiss_int64 upper = 0;\n"
13806 "res = fcvt_64_32(*((RISCV64*)cpu)->X[" +
toString(rs1) +
"], (etiss_uint32)2);\n"
13807 #if RISCV64_DEBUG_CALL
13808 "printf(\"res = %#x\\n\",res); \n"
13812 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
13813 #if RISCV64_DEBUG_CALL
13814 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
13821 #if RISCV64_DEBUG_CALL
13822 "printf(\"upper = %#lx\\n\",upper); \n"
13824 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 32) | (etiss_uint64)res);\n"
13825 #if RISCV64_DEBUG_CALL
13826 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
13861 partInit.
code() = std::string(
"//fcvt.s.lu\n")+
13862 "etiss_uint32 temp = 0;\n"
13863 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
13864 #if RISCV64_Pipeline1
13865 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13866 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13867 "etiss_uint32 num_stages = 4;\n"
13868 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13869 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13871 #if RISCV64_Pipeline2
13872 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13873 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13874 "etiss_uint32 num_stages = 4;\n"
13875 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13876 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13879 "etiss_uint32 res = 0;\n"
13880 "etiss_int64 upper = 0;\n"
13882 "res = fcvt_64_32(*((RISCV64*)cpu)->X[" +
toString(rs1) +
"], (etiss_uint32)3);\n"
13883 #if RISCV64_DEBUG_CALL
13884 "printf(\"res = %#x\\n\",res); \n"
13888 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
13889 #if RISCV64_DEBUG_CALL
13890 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
13897 #if RISCV64_DEBUG_CALL
13898 "printf(\"upper = %#lx\\n\",upper); \n"
13900 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 32) | (etiss_uint64)res);\n"
13901 #if RISCV64_DEBUG_CALL
13902 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
13934 partInit.
code() = std::string(
"//fmv.w.x\n")+
13935 "etiss_uint32 temp = 0;\n"
13936 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
13937 #if RISCV64_Pipeline1
13938 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13939 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13940 "etiss_uint32 num_stages = 4;\n"
13941 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13942 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13944 #if RISCV64_Pipeline2
13945 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13946 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13947 "etiss_uint32 num_stages = 4;\n"
13948 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13949 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13952 "etiss_int64 upper = 0;\n"
13956 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = (*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff);\n"
13957 #if RISCV64_DEBUG_CALL
13958 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
13965 #if RISCV64_DEBUG_CALL
13966 "printf(\"upper = %#lx\\n\",upper); \n"
13968 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 32) | (etiss_uint64)(*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff));\n"
13969 #if RISCV64_DEBUG_CALL
13970 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
14009 partInit.
code() = std::string(
"//fsub.d\n")+
14010 "etiss_uint32 temp = 0;\n"
14011 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
14012 #if RISCV64_Pipeline1
14013 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14014 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14015 "etiss_uint32 num_stages = 4;\n"
14016 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14017 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14019 #if RISCV64_Pipeline2
14020 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14021 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14022 "etiss_uint32 num_stages = 4;\n"
14023 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14024 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14027 "etiss_uint64 res = 0;\n"
14028 "etiss_int64 upper = 0;\n"
14029 "etiss_uint32 flags = 0;\n"
14030 "etiss_uint32 choose1 = 0;\n"
14034 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
14035 #if RISCV64_DEBUG_CALL
14036 "printf(\"choose1 = %#x\\n\",choose1); \n"
14042 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
14043 #if RISCV64_DEBUG_CALL
14044 "printf(\"choose1 = %#x\\n\",choose1); \n"
14047 "res = fsub_d((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F[" +
toString(rs2) +
"] & 0xffffffffffffffff), choose1);\n"
14048 #if RISCV64_DEBUG_CALL
14049 "printf(\"res = %#lx\\n\",res); \n"
14053 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
14054 #if RISCV64_DEBUG_CALL
14055 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
14062 #if RISCV64_DEBUG_CALL
14063 "printf(\"upper = %#lx\\n\",upper); \n"
14065 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 64) | res);\n"
14066 #if RISCV64_DEBUG_CALL
14067 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
14070 "flags = fget_flags();\n"
14071 #if RISCV64_DEBUG_CALL
14072 "printf(\"flags = %#x\\n\",flags); \n"
14074 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
14075 #if RISCV64_DEBUG_CALL
14076 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
14114 partInit.
code() = std::string(
"//fdiv.d\n")+
14115 "etiss_uint32 temp = 0;\n"
14116 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
14117 #if RISCV64_Pipeline1
14118 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14119 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14120 "etiss_uint32 num_stages = 4;\n"
14121 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14122 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14124 #if RISCV64_Pipeline2
14125 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14126 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14127 "etiss_uint32 num_stages = 4;\n"
14128 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14129 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14132 "etiss_uint64 res = 0;\n"
14133 "etiss_int64 upper = 0;\n"
14134 "etiss_uint32 flags = 0;\n"
14135 "etiss_uint32 choose1 = 0;\n"
14139 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
14140 #if RISCV64_DEBUG_CALL
14141 "printf(\"choose1 = %#x\\n\",choose1); \n"
14147 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
14148 #if RISCV64_DEBUG_CALL
14149 "printf(\"choose1 = %#x\\n\",choose1); \n"
14152 "res = fdiv_d((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F[" +
toString(rs2) +
"] & 0xffffffffffffffff), choose1);\n"
14153 #if RISCV64_DEBUG_CALL
14154 "printf(\"res = %#lx\\n\",res); \n"
14158 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
14159 #if RISCV64_DEBUG_CALL
14160 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
14167 #if RISCV64_DEBUG_CALL
14168 "printf(\"upper = %#lx\\n\",upper); \n"
14170 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 64) | res);\n"
14171 #if RISCV64_DEBUG_CALL
14172 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
14175 "flags = fget_flags();\n"
14176 #if RISCV64_DEBUG_CALL
14177 "printf(\"flags = %#x\\n\",flags); \n"
14179 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
14180 #if RISCV64_DEBUG_CALL
14181 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
14215 partInit.
code() = std::string(
"//fsqrt.d\n")+
14216 "etiss_uint32 temp = 0;\n"
14217 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
14218 #if RISCV64_Pipeline1
14219 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14220 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14221 "etiss_uint32 num_stages = 4;\n"
14222 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14223 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14225 #if RISCV64_Pipeline2
14226 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14227 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14228 "etiss_uint32 num_stages = 4;\n"
14229 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14230 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14233 "etiss_uint64 res = 0;\n"
14234 "etiss_int64 upper = 0;\n"
14235 "etiss_uint32 flags = 0;\n"
14236 "etiss_uint32 choose1 = 0;\n"
14240 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
14241 #if RISCV64_DEBUG_CALL
14242 "printf(\"choose1 = %#x\\n\",choose1); \n"
14248 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
14249 #if RISCV64_DEBUG_CALL
14250 "printf(\"choose1 = %#x\\n\",choose1); \n"
14253 "res = fsqrt_d((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffffffffffff), choose1);\n"
14254 #if RISCV64_DEBUG_CALL
14255 "printf(\"res = %#lx\\n\",res); \n"
14259 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
14260 #if RISCV64_DEBUG_CALL
14261 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
14268 #if RISCV64_DEBUG_CALL
14269 "printf(\"upper = %#lx\\n\",upper); \n"
14271 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 64) | res);\n"
14272 #if RISCV64_DEBUG_CALL
14273 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
14276 "flags = fget_flags();\n"
14277 #if RISCV64_DEBUG_CALL
14278 "printf(\"flags = %#x\\n\",flags); \n"
14280 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
14281 #if RISCV64_DEBUG_CALL
14282 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
14318 partInit.
code() = std::string(
"//fsgnj.d\n")+
14319 "etiss_uint32 temp = 0;\n"
14320 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
14321 #if RISCV64_Pipeline1
14322 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14323 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14324 "etiss_uint32 num_stages = 4;\n"
14325 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14326 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14328 #if RISCV64_Pipeline2
14329 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14330 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14331 "etiss_uint32 num_stages = 4;\n"
14332 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14333 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14336 "etiss_uint64 res = 0;\n"
14337 "etiss_int64 ONE = 0;\n"
14338 "etiss_int64 upper = 0;\n"
14339 "etiss_int64 MSK1 = 0;\n"
14340 "etiss_int64 MSK2 = 0;\n"
14343 #if RISCV64_DEBUG_CALL
14344 "printf(\"ONE = %#lx\\n\",ONE); \n"
14346 "MSK1 = (ONE << 63);\n"
14347 #if RISCV64_DEBUG_CALL
14348 "printf(\"MSK1 = %#lx\\n\",MSK1); \n"
14350 "MSK2 = MSK1 - 1;\n"
14351 #if RISCV64_DEBUG_CALL
14352 "printf(\"MSK2 = %#lx\\n\",MSK2); \n"
14354 "res = (((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffffffffffff) & MSK2) | ((((RISCV64*)cpu)->F[" +
toString(rs2) +
"] & 0xffffffffffffffff) & MSK1));\n"
14355 #if RISCV64_DEBUG_CALL
14356 "printf(\"res = %#lx\\n\",res); \n"
14360 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
14361 #if RISCV64_DEBUG_CALL
14362 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
14369 #if RISCV64_DEBUG_CALL
14370 "printf(\"upper = %#lx\\n\",upper); \n"
14372 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 64) | res);\n"
14373 #if RISCV64_DEBUG_CALL
14374 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
14411 partInit.
code() = std::string(
"//fsgnjn.d\n")+
14412 "etiss_uint32 temp = 0;\n"
14413 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
14414 #if RISCV64_Pipeline1
14415 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14416 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14417 "etiss_uint32 num_stages = 4;\n"
14418 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14419 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14421 #if RISCV64_Pipeline2
14422 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14423 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14424 "etiss_uint32 num_stages = 4;\n"
14425 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14426 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14429 "etiss_uint64 res = 0;\n"
14430 "etiss_int64 ONE = 0;\n"
14431 "etiss_int64 upper = 0;\n"
14432 "etiss_int64 MSK1 = 0;\n"
14433 "etiss_int64 MSK2 = 0;\n"
14436 #if RISCV64_DEBUG_CALL
14437 "printf(\"ONE = %#lx\\n\",ONE); \n"
14439 "MSK1 = (ONE << 63);\n"
14440 #if RISCV64_DEBUG_CALL
14441 "printf(\"MSK1 = %#lx\\n\",MSK1); \n"
14443 "MSK2 = MSK1 - 1;\n"
14444 #if RISCV64_DEBUG_CALL
14445 "printf(\"MSK2 = %#lx\\n\",MSK2); \n"
14447 "res = (((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffffffffffff) & MSK2) | (~(((RISCV64*)cpu)->F[" +
toString(rs2) +
"] & 0xffffffffffffffff) & MSK1))&0xffffffffffffffff;\n"
14448 #if RISCV64_DEBUG_CALL
14449 "printf(\"res = %#lx\\n\",res); \n"
14453 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
14454 #if RISCV64_DEBUG_CALL
14455 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
14462 #if RISCV64_DEBUG_CALL
14463 "printf(\"upper = %#lx\\n\",upper); \n"
14465 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 64) | res);\n"
14466 #if RISCV64_DEBUG_CALL
14467 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
14504 partInit.
code() = std::string(
"//fsgnjx.d\n")+
14505 "etiss_uint32 temp = 0;\n"
14506 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
14507 #if RISCV64_Pipeline1
14508 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14509 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14510 "etiss_uint32 num_stages = 4;\n"
14511 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14512 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14514 #if RISCV64_Pipeline2
14515 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14516 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14517 "etiss_uint32 num_stages = 4;\n"
14518 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14519 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14522 "etiss_uint64 res = 0;\n"
14523 "etiss_int64 ONE = 0;\n"
14524 "etiss_int64 upper = 0;\n"
14525 "etiss_int64 MSK1 = 0;\n"
14528 #if RISCV64_DEBUG_CALL
14529 "printf(\"ONE = %#lx\\n\",ONE); \n"
14531 "MSK1 = (ONE << 63);\n"
14532 #if RISCV64_DEBUG_CALL
14533 "printf(\"MSK1 = %#lx\\n\",MSK1); \n"
14535 "res = ((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffffffffffff) ^ ((((RISCV64*)cpu)->F[" +
toString(rs2) +
"] & 0xffffffffffffffff) & MSK1));\n"
14536 #if RISCV64_DEBUG_CALL
14537 "printf(\"res = %#lx\\n\",res); \n"
14541 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
14542 #if RISCV64_DEBUG_CALL
14543 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
14550 #if RISCV64_DEBUG_CALL
14551 "printf(\"upper = %#lx\\n\",upper); \n"
14553 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 64) | res);\n"
14554 #if RISCV64_DEBUG_CALL
14555 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
14590 partInit.
code() = std::string(
"//fmin.d\n")+
14591 "etiss_uint32 temp = 0;\n"
14592 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
14593 #if RISCV64_Pipeline1
14594 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14595 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14596 "etiss_uint32 num_stages = 4;\n"
14597 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14598 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14600 #if RISCV64_Pipeline2
14601 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14602 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14603 "etiss_uint32 num_stages = 4;\n"
14604 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14605 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14608 "etiss_uint64 res = 0;\n"
14609 "etiss_int64 upper = 0;\n"
14610 "etiss_uint32 flags = 0;\n"
14612 "res = fsel_d((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F[" +
toString(rs2) +
"] & 0xffffffffffffffff), (etiss_uint32)0);\n"
14613 #if RISCV64_DEBUG_CALL
14614 "printf(\"res = %#lx\\n\",res); \n"
14618 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
14619 #if RISCV64_DEBUG_CALL
14620 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
14627 #if RISCV64_DEBUG_CALL
14628 "printf(\"upper = %#lx\\n\",upper); \n"
14630 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 64) | res);\n"
14631 #if RISCV64_DEBUG_CALL
14632 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
14635 "flags = fget_flags();\n"
14636 #if RISCV64_DEBUG_CALL
14637 "printf(\"flags = %#x\\n\",flags); \n"
14639 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
14640 #if RISCV64_DEBUG_CALL
14641 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
14675 partInit.
code() = std::string(
"//fmax.d\n")+
14676 "etiss_uint32 temp = 0;\n"
14677 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
14678 #if RISCV64_Pipeline1
14679 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14680 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14681 "etiss_uint32 num_stages = 4;\n"
14682 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14683 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14685 #if RISCV64_Pipeline2
14686 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14687 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14688 "etiss_uint32 num_stages = 4;\n"
14689 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14690 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14693 "etiss_uint64 res = 0;\n"
14694 "etiss_int64 upper = 0;\n"
14695 "etiss_uint32 flags = 0;\n"
14697 "res = fsel_d((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F[" +
toString(rs2) +
"] & 0xffffffffffffffff), (etiss_uint32)1);\n"
14698 #if RISCV64_DEBUG_CALL
14699 "printf(\"res = %#lx\\n\",res); \n"
14703 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
14704 #if RISCV64_DEBUG_CALL
14705 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
14712 #if RISCV64_DEBUG_CALL
14713 "printf(\"upper = %#lx\\n\",upper); \n"
14715 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 64) | res);\n"
14716 #if RISCV64_DEBUG_CALL
14717 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
14720 "flags = fget_flags();\n"
14721 #if RISCV64_DEBUG_CALL
14722 "printf(\"flags = %#x\\n\",flags); \n"
14724 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
14725 #if RISCV64_DEBUG_CALL
14726 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
14760 partInit.
code() = std::string(
"//fcvt.d.s\n")+
14761 "etiss_uint32 temp = 0;\n"
14762 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
14763 #if RISCV64_Pipeline1
14764 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14765 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14766 "etiss_uint32 num_stages = 4;\n"
14767 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14768 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14770 #if RISCV64_Pipeline2
14771 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14772 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14773 "etiss_uint32 num_stages = 4;\n"
14774 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14775 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14778 "etiss_uint64 res = 0;\n"
14779 "etiss_int64 upper = 0;\n"
14781 "res = fconv_f2d((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffff), (" +
toString(rm) +
" & 0xff));\n"
14782 #if RISCV64_DEBUG_CALL
14783 "printf(\"res = %#lx\\n\",res); \n"
14787 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
14788 #if RISCV64_DEBUG_CALL
14789 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
14796 #if RISCV64_DEBUG_CALL
14797 "printf(\"upper = %#lx\\n\",upper); \n"
14799 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 64) | res);\n"
14800 #if RISCV64_DEBUG_CALL
14801 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
14836 partInit.
code() = std::string(
"//feq.d\n")+
14837 "etiss_uint32 temp = 0;\n"
14838 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
14839 #if RISCV64_Pipeline1
14840 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14841 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14842 "etiss_uint32 num_stages = 4;\n"
14843 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14844 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14846 #if RISCV64_Pipeline2
14847 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14848 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14849 "etiss_uint32 num_stages = 4;\n"
14850 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14851 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14854 "etiss_uint32 flags = 0;\n"
14856 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_uint64)fcmp_d((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F[" +
toString(rs2) +
"] & 0xffffffffffffffff), (etiss_uint32)0);\n"
14857 #if RISCV64_DEBUG_CALL
14858 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
14860 "flags = fget_flags();\n"
14861 #if RISCV64_DEBUG_CALL
14862 "printf(\"flags = %#x\\n\",flags); \n"
14864 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
14865 #if RISCV64_DEBUG_CALL
14866 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
14900 partInit.
code() = std::string(
"//flt.d\n")+
14901 "etiss_uint32 temp = 0;\n"
14902 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
14903 #if RISCV64_Pipeline1
14904 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14905 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14906 "etiss_uint32 num_stages = 4;\n"
14907 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14908 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14910 #if RISCV64_Pipeline2
14911 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14912 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14913 "etiss_uint32 num_stages = 4;\n"
14914 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14915 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14918 "etiss_uint32 flags = 0;\n"
14920 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_uint64)fcmp_d((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F[" +
toString(rs2) +
"] & 0xffffffffffffffff), (etiss_uint32)2);\n"
14921 #if RISCV64_DEBUG_CALL
14922 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
14924 "flags = fget_flags();\n"
14925 #if RISCV64_DEBUG_CALL
14926 "printf(\"flags = %#x\\n\",flags); \n"
14928 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
14929 #if RISCV64_DEBUG_CALL
14930 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
14964 partInit.
code() = std::string(
"//fle.d\n")+
14965 "etiss_uint32 temp = 0;\n"
14966 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
14967 #if RISCV64_Pipeline1
14968 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14969 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14970 "etiss_uint32 num_stages = 4;\n"
14971 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14972 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14974 #if RISCV64_Pipeline2
14975 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14976 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14977 "etiss_uint32 num_stages = 4;\n"
14978 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14979 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14982 "etiss_uint32 flags = 0;\n"
14984 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_uint64)fcmp_d((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F[" +
toString(rs2) +
"] & 0xffffffffffffffff), (etiss_uint32)1);\n"
14985 #if RISCV64_DEBUG_CALL
14986 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
14988 "flags = fget_flags();\n"
14989 #if RISCV64_DEBUG_CALL
14990 "printf(\"flags = %#x\\n\",flags); \n"
14992 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
14993 #if RISCV64_DEBUG_CALL
14994 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
15024 partInit.
code() = std::string(
"//fclass.d\n")+
15025 "etiss_uint32 temp = 0;\n"
15026 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
15027 #if RISCV64_Pipeline1
15028 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15029 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15030 "etiss_uint32 num_stages = 4;\n"
15031 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15032 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15034 #if RISCV64_Pipeline2
15035 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15036 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15037 "etiss_uint32 num_stages = 4;\n"
15038 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15039 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15043 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = fclass_d((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffffffffffff));\n"
15044 #if RISCV64_DEBUG_CALL
15045 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
15076 partInit.
code() = std::string(
"//fmv.x.d\n")+
15077 "etiss_uint32 temp = 0;\n"
15078 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
15079 #if RISCV64_Pipeline1
15080 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15081 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15082 "etiss_uint32 num_stages = 4;\n"
15083 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15084 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15086 #if RISCV64_Pipeline2
15087 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15088 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15089 "etiss_uint32 num_stages = 4;\n"
15090 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15091 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15095 "etiss_int64 cast_0 = ((RISCV64*)cpu)->F[" +
toString(rs1) +
"]; \n"
15096 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
15098 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
15100 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
15101 #if RISCV64_DEBUG_CALL
15102 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
15136 partInit.
code() = std::string(
"//fcvt.w.d\n")+
15137 "etiss_uint32 temp = 0;\n"
15138 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
15139 #if RISCV64_Pipeline1
15140 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15141 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15142 "etiss_uint32 num_stages = 4;\n"
15143 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15144 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15146 #if RISCV64_Pipeline2
15147 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15148 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15149 "etiss_uint32 num_stages = 4;\n"
15150 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15151 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15154 "etiss_uint32 flags = 0;\n"
15156 "etiss_int32 cast_0 = fcvt_64_32((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffffffffffff), (etiss_uint32)0, (" +
toString(rm) +
" & 0xff)); \n"
15157 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
15159 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
15161 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
15162 #if RISCV64_DEBUG_CALL
15163 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
15165 "flags = fget_flags();\n"
15166 #if RISCV64_DEBUG_CALL
15167 "printf(\"flags = %#x\\n\",flags); \n"
15169 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
15170 #if RISCV64_DEBUG_CALL
15171 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
15205 partInit.
code() = std::string(
"//fcvt.wu.d\n")+
15206 "etiss_uint32 temp = 0;\n"
15207 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
15208 #if RISCV64_Pipeline1
15209 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15210 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15211 "etiss_uint32 num_stages = 4;\n"
15212 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15213 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15215 #if RISCV64_Pipeline2
15216 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15217 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15218 "etiss_uint32 num_stages = 4;\n"
15219 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15220 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15223 "etiss_uint32 flags = 0;\n"
15225 "etiss_int32 cast_0 = fcvt_64_32((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffffffffffff), (etiss_uint32)1, (" +
toString(rm) +
" & 0xff)); \n"
15226 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
15228 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
15230 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
15231 #if RISCV64_DEBUG_CALL
15232 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
15234 "flags = fget_flags();\n"
15235 #if RISCV64_DEBUG_CALL
15236 "printf(\"flags = %#x\\n\",flags); \n"
15238 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
15239 #if RISCV64_DEBUG_CALL
15240 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
15274 partInit.
code() = std::string(
"//fcvt.l.d\n")+
15275 "etiss_uint32 temp = 0;\n"
15276 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
15277 #if RISCV64_Pipeline1
15278 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15279 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15280 "etiss_uint32 num_stages = 4;\n"
15281 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15282 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15284 #if RISCV64_Pipeline2
15285 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15286 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15287 "etiss_uint32 num_stages = 4;\n"
15288 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15289 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15292 "etiss_uint32 flags = 0;\n"
15294 "etiss_int64 cast_0 = fcvt_d((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffffffffffff), (etiss_uint32)0, (" +
toString(rm) +
" & 0xff)); \n"
15295 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
15297 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
15299 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
15300 #if RISCV64_DEBUG_CALL
15301 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
15303 "flags = fget_flags();\n"
15304 #if RISCV64_DEBUG_CALL
15305 "printf(\"flags = %#x\\n\",flags); \n"
15307 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
15308 #if RISCV64_DEBUG_CALL
15309 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
15343 partInit.
code() = std::string(
"//fcvt.lu.d\n")+
15344 "etiss_uint32 temp = 0;\n"
15345 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
15346 #if RISCV64_Pipeline1
15347 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15348 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15349 "etiss_uint32 num_stages = 4;\n"
15350 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15351 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15353 #if RISCV64_Pipeline2
15354 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15355 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15356 "etiss_uint32 num_stages = 4;\n"
15357 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15358 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15361 "etiss_uint32 flags = 0;\n"
15363 "etiss_int64 cast_0 = fcvt_d((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffffffffffff), (etiss_uint32)1, (" +
toString(rm) +
" & 0xff)); \n"
15364 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
15366 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
15368 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
15369 #if RISCV64_DEBUG_CALL
15370 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
15372 "flags = fget_flags();\n"
15373 #if RISCV64_DEBUG_CALL
15374 "printf(\"flags = %#x\\n\",flags); \n"
15376 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
15377 #if RISCV64_DEBUG_CALL
15378 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
15413 partInit.
code() = std::string(
"//fcvt.d.w\n")+
15414 "etiss_uint32 temp = 0;\n"
15415 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
15416 #if RISCV64_Pipeline1
15417 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15418 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15419 "etiss_uint32 num_stages = 4;\n"
15420 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15421 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15423 #if RISCV64_Pipeline2
15424 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15425 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15426 "etiss_uint32 num_stages = 4;\n"
15427 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15428 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15431 "etiss_uint64 res = 0;\n"
15432 "etiss_int64 upper = 0;\n"
15434 "etiss_int64 cast_0 = (*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff); \n"
15435 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
15437 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
15439 "res = fcvt_32_64((etiss_int64)cast_0, (etiss_uint32)2, (" +
toString(rm) +
" & 0xff));\n"
15440 #if RISCV64_DEBUG_CALL
15441 "printf(\"res = %#lx\\n\",res); \n"
15445 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
15446 #if RISCV64_DEBUG_CALL
15447 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
15454 #if RISCV64_DEBUG_CALL
15455 "printf(\"upper = %#lx\\n\",upper); \n"
15457 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 64) | res);\n"
15458 #if RISCV64_DEBUG_CALL
15459 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
15495 partInit.
code() = std::string(
"//fcvt.d.wu\n")+
15496 "etiss_uint32 temp = 0;\n"
15497 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
15498 #if RISCV64_Pipeline1
15499 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15500 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15501 "etiss_uint32 num_stages = 4;\n"
15502 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15503 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15505 #if RISCV64_Pipeline2
15506 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15507 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15508 "etiss_uint32 num_stages = 4;\n"
15509 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15510 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15513 "etiss_uint64 res = 0;\n"
15514 "etiss_int64 upper = 0;\n"
15516 "res = fcvt_32_64((etiss_uint64)(*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff), (etiss_uint32)3, (" +
toString(rm) +
" & 0xff));\n"
15517 #if RISCV64_DEBUG_CALL
15518 "printf(\"res = %#lx\\n\",res); \n"
15522 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
15523 #if RISCV64_DEBUG_CALL
15524 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
15531 #if RISCV64_DEBUG_CALL
15532 "printf(\"upper = %#lx\\n\",upper); \n"
15534 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 64) | res);\n"
15535 #if RISCV64_DEBUG_CALL
15536 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
15572 partInit.
code() = std::string(
"//fcvt.d.l\n")+
15573 "etiss_uint32 temp = 0;\n"
15574 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
15575 #if RISCV64_Pipeline1
15576 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15577 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15578 "etiss_uint32 num_stages = 4;\n"
15579 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15580 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15582 #if RISCV64_Pipeline2
15583 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15584 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15585 "etiss_uint32 num_stages = 4;\n"
15586 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15587 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15590 "etiss_uint64 res = 0;\n"
15591 "etiss_int64 upper = 0;\n"
15593 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
15594 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
15596 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
15598 "res = fcvt_d((etiss_int64)cast_0, (etiss_uint32)2, (" +
toString(rm) +
" & 0xff));\n"
15599 #if RISCV64_DEBUG_CALL
15600 "printf(\"res = %#lx\\n\",res); \n"
15604 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
15605 #if RISCV64_DEBUG_CALL
15606 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
15613 #if RISCV64_DEBUG_CALL
15614 "printf(\"upper = %#lx\\n\",upper); \n"
15616 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 64) | res);\n"
15617 #if RISCV64_DEBUG_CALL
15618 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
15654 partInit.
code() = std::string(
"//fcvt.d.lu\n")+
15655 "etiss_uint32 temp = 0;\n"
15656 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
15657 #if RISCV64_Pipeline1
15658 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15659 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15660 "etiss_uint32 num_stages = 4;\n"
15661 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15662 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15664 #if RISCV64_Pipeline2
15665 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15666 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15667 "etiss_uint32 num_stages = 4;\n"
15668 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15669 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15672 "etiss_uint64 res = 0;\n"
15673 "etiss_int64 upper = 0;\n"
15675 "res = fcvt_d((etiss_uint64)*((RISCV64*)cpu)->X[" +
toString(rs1) +
"], (etiss_uint32)3, (" +
toString(rm) +
" & 0xff));\n"
15676 #if RISCV64_DEBUG_CALL
15677 "printf(\"res = %#lx\\n\",res); \n"
15681 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
15682 #if RISCV64_DEBUG_CALL
15683 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
15690 #if RISCV64_DEBUG_CALL
15691 "printf(\"upper = %#lx\\n\",upper); \n"
15693 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 64) | res);\n"
15694 #if RISCV64_DEBUG_CALL
15695 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
15727 partInit.
code() = std::string(
"//fmv.d.x\n")+
15728 "etiss_uint32 temp = 0;\n"
15729 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
15730 #if RISCV64_Pipeline1
15731 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15732 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15733 "etiss_uint32 num_stages = 4;\n"
15734 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15735 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15737 #if RISCV64_Pipeline2
15738 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15739 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15740 "etiss_uint32 num_stages = 4;\n"
15741 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15742 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15746 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = (etiss_uint64)*((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
15747 #if RISCV64_DEBUG_CALL
15748 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
15788 partInit.
code() = std::string(
"//c.addi4spn\n")+
15789 "etiss_uint32 exception = 0;\n"
15790 "etiss_uint32 temp = 0;\n"
15791 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
15792 #if RISCV64_Pipeline1
15793 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15794 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15795 "etiss_uint32 num_stages = 4;\n"
15796 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15797 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15799 #if RISCV64_Pipeline2
15800 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15801 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15802 "etiss_uint32 num_stages = 4;\n"
15803 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15804 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15808 "if(" +
toString(imm) +
" == 0)\n"
15810 "exception = ETISS_RETURNCODE_ILLEGALINSTRUCTION; \n"
15813 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
" + 8] = *((RISCV64*)cpu)->X[2] + " +
toString(imm) +
";\n"
15814 #if RISCV64_DEBUG_CALL
15815 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
" + 8] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
" + 8]); \n"
15820 "return exception;\n"
15850 partInit.
code() = std::string(
"//c.addi\n")+
15851 "etiss_uint32 temp = 0;\n"
15852 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
15853 #if RISCV64_Pipeline1
15854 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15855 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15856 "etiss_uint32 num_stages = 4;\n"
15857 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15858 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15860 #if RISCV64_Pipeline2
15861 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15862 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15863 "etiss_uint32 num_stages = 4;\n"
15864 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15865 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15868 "etiss_int64 imm_extended = 0;\n"
15870 "if((" +
toString(imm) +
" & 0x20)>>5 == 0)\n"
15872 "imm_extended = 0;\n"
15873 #if RISCV64_DEBUG_CALL
15874 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
15880 "imm_extended = 4294967295;\n"
15881 #if RISCV64_DEBUG_CALL
15882 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
15884 "imm_extended = (imm_extended << 32);\n"
15885 #if RISCV64_DEBUG_CALL
15886 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
15888 "imm_extended = imm_extended + 4294967232;\n"
15889 #if RISCV64_DEBUG_CALL
15890 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
15893 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
15894 #if RISCV64_DEBUG_CALL
15895 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
15897 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
15898 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
15900 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
15902 "*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] = (etiss_int64)cast_0 + imm_extended;\n"
15903 #if RISCV64_DEBUG_CALL
15904 "printf(\"*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(rs1) +
"]); \n"
15925 partInit.
code() = std::string(
"//c.nop\n")+
15926 "etiss_uint32 temp = 0;\n"
15927 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
15929 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15930 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15931 "etiss_uint32 num_stages = 4;\n"
15932 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15933 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15936 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15937 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15938 "etiss_uint32 num_stages = 4;\n"
15939 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15940 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15963 partInit.
code() = std::string(
"//dii\n")+
15964 "etiss_uint32 exception = 0;\n"
15965 "etiss_uint32 temp = 0;\n"
15966 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
15968 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15969 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15970 "etiss_uint32 num_stages = 4;\n"
15971 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15972 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15975 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15976 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15977 "etiss_uint32 num_stages = 4;\n"
15978 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15979 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15983 "exception = ETISS_RETURNCODE_ILLEGALINSTRUCTION; \n"
15987 "return exception;\n"
16009 shamt += shamt_5<<5;
16017 partInit.
code() = std::string(
"//c.slli\n")+
16018 "etiss_uint32 exception = 0;\n"
16019 "etiss_uint32 temp = 0;\n"
16020 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
16021 #if RISCV64_Pipeline1
16022 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16023 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16024 "etiss_uint32 num_stages = 4;\n"
16025 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16026 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16028 #if RISCV64_Pipeline2
16029 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16030 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16031 "etiss_uint32 num_stages = 4;\n"
16032 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16033 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16037 "if(" +
toString(rs1) +
" == 0)\n"
16039 "exception = ETISS_RETURNCODE_ILLEGALINSTRUCTION; \n"
16042 "*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] = (*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] << " +
toString(shamt) +
");\n"
16043 #if RISCV64_DEBUG_CALL
16044 "printf(\"*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(rs1) +
"]); \n"
16049 "return exception;\n"
16086 partInit.
code() = std::string(
"//c.lw\n")+
16087 "etiss_uint32 exception = 0;\n"
16088 "etiss_uint32 temp = 0;\n"
16089 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
16090 #if RISCV64_Pipeline1
16091 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16092 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16093 "etiss_uint32 num_stages = 4;\n"
16094 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16095 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16097 #if RISCV64_Pipeline2
16098 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16099 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16100 "etiss_uint32 num_stages = 4;\n"
16101 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16102 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16105 "etiss_uint64 offs = 0;\n"
16107 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
" + 8] + " +
toString(uimm) +
";\n"
16108 #if RISCV64_DEBUG_CALL
16109 "printf(\"offs = %#lx\\n\",offs); \n"
16111 "etiss_uint32 MEM_offs;\n"
16112 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
16113 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n"
16114 "etiss_int32 cast_0 = MEM_offs; \n"
16115 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
16117 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
16119 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
" + 8] = (etiss_int64)cast_0;\n"
16120 #if RISCV64_DEBUG_CALL
16121 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
" + 8] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
" + 8]); \n"
16126 "return exception;\n"
16155 partInit.
code() = std::string(
"//c.li\n")+
16156 "etiss_uint32 exception = 0;\n"
16157 "etiss_uint32 temp = 0;\n"
16158 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
16159 #if RISCV64_Pipeline1
16160 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16161 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16162 "etiss_uint32 num_stages = 4;\n"
16163 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16164 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16166 #if RISCV64_Pipeline2
16167 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16168 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16169 "etiss_uint32 num_stages = 4;\n"
16170 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16171 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16174 "etiss_int64 imm_extended = 0;\n"
16176 "if((" +
toString(imm) +
" & 0x20)>>5 == 0)\n"
16178 "imm_extended = 0;\n"
16179 #if RISCV64_DEBUG_CALL
16180 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
16186 "imm_extended = 4294967295;\n"
16187 #if RISCV64_DEBUG_CALL
16188 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
16190 "imm_extended = (imm_extended << 32);\n"
16191 #if RISCV64_DEBUG_CALL
16192 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
16194 "imm_extended = imm_extended + 4294967232;\n"
16195 #if RISCV64_DEBUG_CALL
16196 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
16199 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
16200 #if RISCV64_DEBUG_CALL
16201 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
16205 "exception = ETISS_RETURNCODE_ILLEGALINSTRUCTION; \n"
16208 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = imm_extended;\n"
16209 #if RISCV64_DEBUG_CALL
16210 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
16215 "return exception;\n"
16248 partInit.
code() = std::string(
"//c.lwsp\n")+
16249 "etiss_uint32 exception = 0;\n"
16250 "etiss_uint32 temp = 0;\n"
16251 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
16252 #if RISCV64_Pipeline1
16253 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16254 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16255 "etiss_uint32 num_stages = 4;\n"
16256 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16257 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16259 #if RISCV64_Pipeline2
16260 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16261 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16262 "etiss_uint32 num_stages = 4;\n"
16263 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16264 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16267 "etiss_uint64 offs = 0;\n"
16269 "offs = *((RISCV64*)cpu)->X[2] + " +
toString(uimm) +
";\n"
16270 #if RISCV64_DEBUG_CALL
16271 "printf(\"offs = %#lx\\n\",offs); \n"
16273 "etiss_uint32 MEM_offs;\n"
16274 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
16275 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n"
16276 "etiss_int32 cast_0 = MEM_offs; \n"
16277 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
16279 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
16281 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
16282 #if RISCV64_DEBUG_CALL
16283 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
16288 "return exception;\n"
16325 partInit.
code() = std::string(
"//c.sw\n")+
16326 "etiss_uint32 exception = 0;\n"
16327 "etiss_uint32 temp = 0;\n"
16328 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
16329 #if RISCV64_Pipeline1
16330 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16331 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16332 "etiss_uint32 num_stages = 4;\n"
16333 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16334 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16336 #if RISCV64_Pipeline2
16337 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16338 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16339 "etiss_uint32 num_stages = 4;\n"
16340 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16341 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16344 "etiss_uint64 offs = 0;\n"
16346 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
" + 8] + " +
toString(uimm) +
";\n"
16347 #if RISCV64_DEBUG_CALL
16348 "printf(\"offs = %#lx\\n\",offs); \n"
16350 "etiss_uint32 MEM_offs;\n"
16351 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
16352 "MEM_offs = *((RISCV64*)cpu)->X[" +
toString(rs2) +
" + 8];\n"
16353 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n"
16354 #if RISCV64_DEBUG_CALL
16355 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
16357 "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
16359 "((RISCV64*)cpu)->RES = 0;\n"
16360 #if RISCV64_DEBUG_CALL
16361 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
16368 "return exception;\n"
16406 partInit.
code() = std::string(
"//c.beqz\n")+
16407 "etiss_uint32 temp = 0;\n"
16408 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
16409 #if RISCV64_Pipeline1
16410 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16411 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16412 "etiss_uint32 num_stages = 4;\n"
16413 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16414 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16416 #if RISCV64_Pipeline2
16417 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16418 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16419 "etiss_uint32 num_stages = 4;\n"
16420 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16421 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16424 "etiss_int64 imm_extended = 0;\n"
16425 "etiss_int64 choose1 = 0;\n"
16427 "if((" +
toString(imm) +
" & 0x100)>>8 == 0)\n"
16429 "imm_extended = 0;\n"
16430 #if RISCV64_DEBUG_CALL
16431 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
16437 "imm_extended = 4294967295;\n"
16438 #if RISCV64_DEBUG_CALL
16439 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
16441 "imm_extended = (imm_extended << 32);\n"
16442 #if RISCV64_DEBUG_CALL
16443 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
16445 "imm_extended = imm_extended + 4294966784;\n"
16446 #if RISCV64_DEBUG_CALL
16447 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
16450 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
16451 #if RISCV64_DEBUG_CALL
16452 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
16454 "if(*((RISCV64*)cpu)->X[" +
toString(rs1) +
" + 8] == 0)\n"
16457 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
16459 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
16461 "choose1 = (etiss_int64)cast_0 + imm_extended;\n"
16462 #if RISCV64_DEBUG_CALL
16463 "printf(\"choose1 = %#lx\\n\",choose1); \n"
16472 #if RISCV64_DEBUG_CALL
16473 "printf(\"choose1 = %#lx\\n\",choose1); \n"
16476 "cpu->instructionPointer = choose1;\n"
16477 #if RISCV64_DEBUG_CALL
16478 "printf(\"cpu->instructionPointer = %#lx\\n\",cpu->instructionPointer); \n"
16481 "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n"
16513 partInit.
code() = std::string(
"//c.swsp\n")+
16514 "etiss_uint32 exception = 0;\n"
16515 "etiss_uint32 temp = 0;\n"
16516 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
16517 #if RISCV64_Pipeline1
16518 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16519 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16520 "etiss_uint32 num_stages = 4;\n"
16521 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16522 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16524 #if RISCV64_Pipeline2
16525 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16526 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16527 "etiss_uint32 num_stages = 4;\n"
16528 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16529 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16532 "etiss_uint64 offs = 0;\n"
16534 "offs = *((RISCV64*)cpu)->X[2] + " +
toString(uimm) +
";\n"
16535 #if RISCV64_DEBUG_CALL
16536 "printf(\"offs = %#lx\\n\",offs); \n"
16538 "etiss_uint32 MEM_offs;\n"
16539 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
16540 "MEM_offs = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
16541 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n"
16542 #if RISCV64_DEBUG_CALL
16543 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
16545 "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
16547 "((RISCV64*)cpu)->RES = 0;\n"
16548 #if RISCV64_DEBUG_CALL
16549 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
16556 "return exception;\n"
16586 partInit.
code() = std::string(
"//c.addiw\n")+
16587 "etiss_uint32 temp = 0;\n"
16588 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
16589 #if RISCV64_Pipeline1
16590 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16591 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16592 "etiss_uint32 num_stages = 4;\n"
16593 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16594 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16596 #if RISCV64_Pipeline2
16597 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16598 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16599 "etiss_uint32 num_stages = 4;\n"
16600 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16601 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16604 "etiss_int64 imm_extended = 0;\n"
16605 "etiss_int32 res = 0;\n"
16607 "if((" +
toString(imm) +
" & 0x20)>>5 == 0)\n"
16609 "imm_extended = 0;\n"
16610 #if RISCV64_DEBUG_CALL
16611 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
16617 "imm_extended = 4294967295;\n"
16618 #if RISCV64_DEBUG_CALL
16619 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
16621 "imm_extended = (imm_extended << 32);\n"
16622 #if RISCV64_DEBUG_CALL
16623 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
16625 "imm_extended = imm_extended + 4294967232;\n"
16626 #if RISCV64_DEBUG_CALL
16627 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
16630 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
16631 #if RISCV64_DEBUG_CALL
16632 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
16634 "if(" +
toString(rs1) +
" != 0)\n"
16636 "etiss_int64 cast_0 = (*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff); \n"
16637 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
16639 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
16641 "res = (etiss_int32)cast_0 + imm_extended;\n"
16642 #if RISCV64_DEBUG_CALL
16643 "printf(\"res = %#x\\n\",res); \n"
16645 "etiss_int32 cast_1 = res; \n"
16646 "if((etiss_int32)((etiss_uint32)cast_1 - 0x80000000) > 0x0)\n"
16648 "cast_1 =0x0 + (etiss_uint32)cast_1 ;\n"
16650 "*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] = (etiss_int64)cast_1;\n"
16651 #if RISCV64_DEBUG_CALL
16652 "printf(\"*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(rs1) +
"]); \n"
16692 partInit.
code() = std::string(
"//c.fld\n")+
16693 "etiss_uint32 exception = 0;\n"
16694 "etiss_uint32 temp = 0;\n"
16695 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
16696 #if RISCV64_Pipeline1
16697 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16698 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16699 "etiss_uint32 num_stages = 4;\n"
16700 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16701 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16703 #if RISCV64_Pipeline2
16704 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16705 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16706 "etiss_uint32 num_stages = 4;\n"
16707 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16708 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16711 "etiss_uint64 offs = 0;\n"
16712 "etiss_uint64 res = 0;\n"
16713 "etiss_int64 upper = 0;\n"
16715 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
" + 8] + " +
toString(uimm) +
";\n"
16716 #if RISCV64_DEBUG_CALL
16717 "printf(\"offs = %#lx\\n\",offs); \n"
16719 "etiss_uint64 MEM_offs;\n"
16720 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
16721 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n"
16722 "res = MEM_offs;\n"
16723 #if RISCV64_DEBUG_CALL
16724 "printf(\"res = %#lx\\n\",res); \n"
16728 "((RISCV64*)cpu)->F[" +
toString(
rd) +
" + 8] = res;\n"
16729 #if RISCV64_DEBUG_CALL
16730 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
" + 8] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
" + 8]); \n"
16737 #if RISCV64_DEBUG_CALL
16738 "printf(\"upper = %#lx\\n\",upper); \n"
16740 "((RISCV64*)cpu)->F[" +
toString(
rd) +
" + 8] = ((upper << 64) | res);\n"
16741 #if RISCV64_DEBUG_CALL
16742 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
" + 8] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
" + 8]); \n"
16748 "return exception;\n"
16781 partInit.
code() = std::string(
"//c.fldsp\n")+
16782 "etiss_uint32 exception = 0;\n"
16783 "etiss_uint32 temp = 0;\n"
16784 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
16785 #if RISCV64_Pipeline1
16786 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16787 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16788 "etiss_uint32 num_stages = 4;\n"
16789 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16790 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16792 #if RISCV64_Pipeline2
16793 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16794 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16795 "etiss_uint32 num_stages = 4;\n"
16796 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16797 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16800 "etiss_uint64 offs = 0;\n"
16801 "etiss_uint64 res = 0;\n"
16802 "etiss_int64 upper = 0;\n"
16804 "offs = *((RISCV64*)cpu)->X[2] + " +
toString(uimm) +
";\n"
16805 #if RISCV64_DEBUG_CALL
16806 "printf(\"offs = %#lx\\n\",offs); \n"
16808 "etiss_uint64 MEM_offs;\n"
16809 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
16810 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n"
16811 "res = MEM_offs;\n"
16812 #if RISCV64_DEBUG_CALL
16813 "printf(\"res = %#lx\\n\",res); \n"
16817 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
16818 #if RISCV64_DEBUG_CALL
16819 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
16826 #if RISCV64_DEBUG_CALL
16827 "printf(\"upper = %#lx\\n\",upper); \n"
16829 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 64) | (etiss_uint64)res);\n"
16830 #if RISCV64_DEBUG_CALL
16831 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
16837 "return exception;\n"
16866 partInit.
code() = std::string(
"//c.lui\n")+
16867 "etiss_uint32 exception = 0;\n"
16868 "etiss_uint32 temp = 0;\n"
16869 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
16870 #if RISCV64_Pipeline1
16871 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16872 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16873 "etiss_uint32 num_stages = 4;\n"
16874 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16875 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16877 #if RISCV64_Pipeline2
16878 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16879 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16880 "etiss_uint32 num_stages = 4;\n"
16881 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16882 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16885 "etiss_int64 imm_extended = 0;\n"
16887 "if((" +
toString(imm) +
" & 0x20000)>>17 == 0)\n"
16889 "imm_extended = 0;\n"
16890 #if RISCV64_DEBUG_CALL
16891 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
16897 "imm_extended = 4294967295;\n"
16898 #if RISCV64_DEBUG_CALL
16899 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
16901 "imm_extended = (imm_extended << 32);\n"
16902 #if RISCV64_DEBUG_CALL
16903 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
16905 "imm_extended = imm_extended + 4294705152;\n"
16906 #if RISCV64_DEBUG_CALL
16907 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
16910 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
16911 #if RISCV64_DEBUG_CALL
16912 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
16916 "exception = ETISS_RETURNCODE_ILLEGALINSTRUCTION; \n"
16919 "if(imm_extended == 0)\n"
16921 "exception = ETISS_RETURNCODE_ILLEGALINSTRUCTION; \n"
16924 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = imm_extended;\n"
16925 #if RISCV64_DEBUG_CALL
16926 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
16931 "return exception;\n"
16966 partInit.
code() = std::string(
"//c.addi16sp\n")+
16967 "etiss_uint32 temp = 0;\n"
16968 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
16969 #if RISCV64_Pipeline1
16970 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16971 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16972 "etiss_uint32 num_stages = 4;\n"
16973 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16974 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16976 #if RISCV64_Pipeline2
16977 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16978 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16979 "etiss_uint32 num_stages = 4;\n"
16980 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16981 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16984 "etiss_int64 imm_extended = 0;\n"
16986 "if((" +
toString(imm) +
" & 0x200)>>9 == 0)\n"
16988 "imm_extended = 0;\n"
16989 #if RISCV64_DEBUG_CALL
16990 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
16996 "imm_extended = 4294967295;\n"
16997 #if RISCV64_DEBUG_CALL
16998 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
17000 "imm_extended = (imm_extended << 32);\n"
17001 #if RISCV64_DEBUG_CALL
17002 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
17004 "imm_extended = imm_extended + 4294966272;\n"
17005 #if RISCV64_DEBUG_CALL
17006 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
17009 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
17010 #if RISCV64_DEBUG_CALL
17011 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
17013 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[2]; \n"
17014 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
17016 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
17018 "*((RISCV64*)cpu)->X[2] = (etiss_int64)cast_0 + imm_extended;\n"
17019 #if RISCV64_DEBUG_CALL
17020 "printf(\"*((RISCV64*)cpu)->X[2] = %#lx\\n\",*((RISCV64*)cpu)->X[2]); \n"
17058 partInit.
code() = std::string(
"//c.ld\n")+
17059 "etiss_uint32 exception = 0;\n"
17060 "etiss_uint32 temp = 0;\n"
17061 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
17062 #if RISCV64_Pipeline1
17063 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17064 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17065 "etiss_uint32 num_stages = 4;\n"
17066 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17067 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17069 #if RISCV64_Pipeline2
17070 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17071 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17072 "etiss_uint32 num_stages = 4;\n"
17073 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17074 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17077 "etiss_uint64 offs = 0;\n"
17079 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
" + 8] + " +
toString(uimm) +
";\n"
17080 #if RISCV64_DEBUG_CALL
17081 "printf(\"offs = %#lx\\n\",offs); \n"
17083 "etiss_uint64 MEM_offs;\n"
17084 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
17085 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n"
17086 "etiss_int64 cast_0 = MEM_offs; \n"
17087 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
17089 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
17091 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
" + 8] = (etiss_int64)cast_0;\n"
17092 #if RISCV64_DEBUG_CALL
17093 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
" + 8] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
" + 8]); \n"
17098 "return exception;\n"
17131 partInit.
code() = std::string(
"//c.ldsp\n")+
17132 "etiss_uint32 exception = 0;\n"
17133 "etiss_uint32 temp = 0;\n"
17134 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
17135 #if RISCV64_Pipeline1
17136 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17137 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17138 "etiss_uint32 num_stages = 4;\n"
17139 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17140 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17142 #if RISCV64_Pipeline2
17143 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17144 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17145 "etiss_uint32 num_stages = 4;\n"
17146 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17147 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17150 "etiss_uint64 offs = 0;\n"
17152 "offs = *((RISCV64*)cpu)->X[2] + " +
toString(uimm) +
";\n"
17153 #if RISCV64_DEBUG_CALL
17154 "printf(\"offs = %#lx\\n\",offs); \n"
17158 "etiss_uint64 MEM_offs;\n"
17159 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
17160 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n"
17161 "etiss_int64 cast_0 = MEM_offs; \n"
17162 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
17164 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
17166 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
17167 #if RISCV64_DEBUG_CALL
17168 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
17175 "return exception;\n"
17197 shamt += shamt_5<<5;
17205 partInit.
code() = std::string(
"//c.srli\n")+
17206 "etiss_uint32 temp = 0;\n"
17207 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
17208 #if RISCV64_Pipeline1
17209 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17210 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17211 "etiss_uint32 num_stages = 4;\n"
17212 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17213 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17215 #if RISCV64_Pipeline2
17216 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17217 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17218 "etiss_uint32 num_stages = 4;\n"
17219 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17220 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17223 "etiss_int8 rs1_idx = 0;\n"
17225 "rs1_idx = " +
toString(rs1) +
" + 8;\n"
17226 #if RISCV64_DEBUG_CALL
17227 "printf(\"rs1_idx = %#x\\n\",rs1_idx); \n"
17229 "*((RISCV64*)cpu)->X[rs1_idx] = (*((RISCV64*)cpu)->X[rs1_idx] >> " +
toString(shamt) +
");\n"
17230 #if RISCV64_DEBUG_CALL
17231 "printf(\"*((RISCV64*)cpu)->X[rs1_idx] = %#lx\\n\",*((RISCV64*)cpu)->X[rs1_idx]); \n"
17257 shamt += shamt_5<<5;
17265 partInit.
code() = std::string(
"//c.srai\n")+
17266 "etiss_uint32 temp = 0;\n"
17267 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
17268 #if RISCV64_Pipeline1
17269 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17270 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17271 "etiss_uint32 num_stages = 4;\n"
17272 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17273 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17275 #if RISCV64_Pipeline2
17276 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17277 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17278 "etiss_uint32 num_stages = 4;\n"
17279 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17280 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17283 "etiss_int8 rs1_idx = 0;\n"
17285 "rs1_idx = " +
toString(rs1) +
" + 8;\n"
17286 #if RISCV64_DEBUG_CALL
17287 "printf(\"rs1_idx = %#x\\n\",rs1_idx); \n"
17289 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[rs1_idx]; \n"
17290 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
17292 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
17294 "*((RISCV64*)cpu)->X[rs1_idx] = ((etiss_int64)cast_0 >> " +
toString(shamt) +
");\n"
17295 #if RISCV64_DEBUG_CALL
17296 "printf(\"*((RISCV64*)cpu)->X[rs1_idx] = %#lx\\n\",*((RISCV64*)cpu)->X[rs1_idx]); \n"
17330 partInit.
code() = std::string(
"//c.andi\n")+
17331 "etiss_uint32 temp = 0;\n"
17332 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
17333 #if RISCV64_Pipeline1
17334 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17335 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17336 "etiss_uint32 num_stages = 4;\n"
17337 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17338 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17340 #if RISCV64_Pipeline2
17341 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17342 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17343 "etiss_uint32 num_stages = 4;\n"
17344 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17345 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17348 "etiss_int64 imm_extended = 0;\n"
17349 "etiss_int8 rs1_idx = 0;\n"
17351 "if((" +
toString(imm) +
" & 0x20)>>5 == 0)\n"
17353 "imm_extended = 0;\n"
17354 #if RISCV64_DEBUG_CALL
17355 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
17361 "imm_extended = 4294967295;\n"
17362 #if RISCV64_DEBUG_CALL
17363 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
17365 "imm_extended = (imm_extended << 32);\n"
17366 #if RISCV64_DEBUG_CALL
17367 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
17369 "imm_extended = imm_extended + 4294967232;\n"
17370 #if RISCV64_DEBUG_CALL
17371 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
17374 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
17375 #if RISCV64_DEBUG_CALL
17376 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
17378 "rs1_idx = " +
toString(rs1) +
" + 8;\n"
17379 #if RISCV64_DEBUG_CALL
17380 "printf(\"rs1_idx = %#x\\n\",rs1_idx); \n"
17382 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[rs1_idx]; \n"
17383 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
17385 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
17387 "*((RISCV64*)cpu)->X[rs1_idx] = ((etiss_int64)cast_0 & imm_extended);\n"
17388 #if RISCV64_DEBUG_CALL
17389 "printf(\"*((RISCV64*)cpu)->X[rs1_idx] = %#lx\\n\",*((RISCV64*)cpu)->X[rs1_idx]); \n"
17421 partInit.
code() = std::string(
"//c.sub\n")+
17422 "etiss_uint32 temp = 0;\n"
17423 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
17424 #if RISCV64_Pipeline1
17425 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17426 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17427 "etiss_uint32 num_stages = 4;\n"
17428 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17429 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17431 #if RISCV64_Pipeline2
17432 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17433 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17434 "etiss_uint32 num_stages = 4;\n"
17435 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17436 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17439 "etiss_int8 rd_idx = 0;\n"
17442 #if RISCV64_DEBUG_CALL
17443 "printf(\"rd_idx = %#x\\n\",rd_idx); \n"
17445 "*((RISCV64*)cpu)->X[rd_idx] = *((RISCV64*)cpu)->X[rd_idx] - *((RISCV64*)cpu)->X[" +
toString(rs2) +
" + 8];\n"
17446 #if RISCV64_DEBUG_CALL
17447 "printf(\"*((RISCV64*)cpu)->X[rd_idx] = %#lx\\n\",*((RISCV64*)cpu)->X[rd_idx]); \n"
17479 partInit.
code() = std::string(
"//c.xor\n")+
17480 "etiss_uint32 temp = 0;\n"
17481 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
17482 #if RISCV64_Pipeline1
17483 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17484 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17485 "etiss_uint32 num_stages = 4;\n"
17486 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17487 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17489 #if RISCV64_Pipeline2
17490 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17491 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17492 "etiss_uint32 num_stages = 4;\n"
17493 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17494 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17497 "etiss_int8 rd_idx = 0;\n"
17500 #if RISCV64_DEBUG_CALL
17501 "printf(\"rd_idx = %#x\\n\",rd_idx); \n"
17503 "*((RISCV64*)cpu)->X[rd_idx] = (*((RISCV64*)cpu)->X[rd_idx] ^ *((RISCV64*)cpu)->X[" +
toString(rs2) +
" + 8]);\n"
17504 #if RISCV64_DEBUG_CALL
17505 "printf(\"*((RISCV64*)cpu)->X[rd_idx] = %#lx\\n\",*((RISCV64*)cpu)->X[rd_idx]); \n"
17537 partInit.
code() = std::string(
"//c.or\n")+
17538 "etiss_uint32 temp = 0;\n"
17539 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
17540 #if RISCV64_Pipeline1
17541 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17542 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17543 "etiss_uint32 num_stages = 4;\n"
17544 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17545 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17547 #if RISCV64_Pipeline2
17548 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17549 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17550 "etiss_uint32 num_stages = 4;\n"
17551 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17552 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17555 "etiss_int8 rd_idx = 0;\n"
17558 #if RISCV64_DEBUG_CALL
17559 "printf(\"rd_idx = %#x\\n\",rd_idx); \n"
17561 "*((RISCV64*)cpu)->X[rd_idx] = (*((RISCV64*)cpu)->X[rd_idx] | *((RISCV64*)cpu)->X[" +
toString(rs2) +
" + 8]);\n"
17562 #if RISCV64_DEBUG_CALL
17563 "printf(\"*((RISCV64*)cpu)->X[rd_idx] = %#lx\\n\",*((RISCV64*)cpu)->X[rd_idx]); \n"
17595 partInit.
code() = std::string(
"//c.and\n")+
17596 "etiss_uint32 temp = 0;\n"
17597 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
17598 #if RISCV64_Pipeline1
17599 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17600 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17601 "etiss_uint32 num_stages = 4;\n"
17602 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17603 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17605 #if RISCV64_Pipeline2
17606 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17607 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17608 "etiss_uint32 num_stages = 4;\n"
17609 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17610 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17613 "etiss_int8 rd_idx = 0;\n"
17616 #if RISCV64_DEBUG_CALL
17617 "printf(\"rd_idx = %#x\\n\",rd_idx); \n"
17619 "*((RISCV64*)cpu)->X[rd_idx] = (*((RISCV64*)cpu)->X[rd_idx] & *((RISCV64*)cpu)->X[" +
toString(rs2) +
" + 8]);\n"
17620 #if RISCV64_DEBUG_CALL
17621 "printf(\"*((RISCV64*)cpu)->X[rd_idx] = %#lx\\n\",*((RISCV64*)cpu)->X[rd_idx]); \n"
17652 partInit.
code() = std::string(
"//c.mv\n")+
17653 "etiss_uint32 temp = 0;\n"
17654 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
17655 #if RISCV64_Pipeline1
17656 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17657 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17658 "etiss_uint32 num_stages = 4;\n"
17659 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17660 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17662 #if RISCV64_Pipeline2
17663 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17664 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17665 "etiss_uint32 num_stages = 4;\n"
17666 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17667 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17671 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
17672 #if RISCV64_DEBUG_CALL
17673 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
17699 partInit.
code() = std::string(
"//c.jr\n")+
17700 "etiss_uint32 temp = 0;\n"
17701 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
17702 #if RISCV64_Pipeline1
17703 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17704 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17705 "etiss_uint32 num_stages = 4;\n"
17706 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17707 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17709 #if RISCV64_Pipeline2
17710 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17711 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17712 "etiss_uint32 num_stages = 4;\n"
17713 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17714 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17718 "cpu->instructionPointer = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
17719 #if RISCV64_DEBUG_CALL
17720 "printf(\"cpu->instructionPointer = %#lx\\n\",cpu->instructionPointer); \n"
17723 "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n"
17753 partInit.
code() = std::string(
"//c.add\n")+
17754 "etiss_uint32 temp = 0;\n"
17755 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
17756 #if RISCV64_Pipeline1
17757 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17758 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17759 "etiss_uint32 num_stages = 4;\n"
17760 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17761 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17763 #if RISCV64_Pipeline2
17764 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17765 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17766 "etiss_uint32 num_stages = 4;\n"
17767 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17768 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17772 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = *((RISCV64*)cpu)->X[" +
toString(
rd) +
"] + *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
17773 #if RISCV64_DEBUG_CALL
17774 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
17801 partInit.
code() = std::string(
"//c.jalr\n")+
17802 "etiss_uint32 temp = 0;\n"
17803 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
17804 #if RISCV64_Pipeline1
17805 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17806 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17807 "etiss_uint32 num_stages = 4;\n"
17808 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17809 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17811 #if RISCV64_Pipeline2
17812 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17813 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17814 "etiss_uint32 num_stages = 4;\n"
17815 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17816 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17821 #if RISCV64_DEBUG_CALL
17822 "printf(\"*((RISCV64*)cpu)->X[1] = %#lx\\n\",*((RISCV64*)cpu)->X[1]); \n"
17824 "cpu->instructionPointer = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
17825 #if RISCV64_DEBUG_CALL
17826 "printf(\"cpu->instructionPointer = %#lx\\n\",cpu->instructionPointer); \n"
17829 "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n"
17848 partInit.
code() = std::string(
"//c.ebreak\n")+
17849 "etiss_uint32 exception = 0;\n"
17850 "etiss_uint32 temp = 0;\n"
17851 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
17853 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17854 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17855 "etiss_uint32 num_stages = 4;\n"
17856 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17857 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17860 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17861 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17862 "etiss_uint32 num_stages = 4;\n"
17863 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17864 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17868 "return ETISS_RETURNCODE_CPUFINISHED; \n"
17872 "return exception;\n"
17900 partInit.
code() = std::string(
"//c.subw\n")+
17901 "etiss_uint32 temp = 0;\n"
17902 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
17903 #if RISCV64_Pipeline1
17904 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17905 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17906 "etiss_uint32 num_stages = 4;\n"
17907 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17908 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17910 #if RISCV64_Pipeline2
17911 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17912 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17913 "etiss_uint32 num_stages = 4;\n"
17914 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17915 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17918 "etiss_uint32 res = 0;\n"
17920 "res = (*((RISCV64*)cpu)->X[" +
toString(
rd) +
" + 8] & 0xffffffff) - (*((RISCV64*)cpu)->X[" +
toString(rs2) +
" + 8] & 0xffffffff);\n"
17921 #if RISCV64_DEBUG_CALL
17922 "printf(\"res = %#x\\n\",res); \n"
17924 "etiss_int32 cast_0 = res; \n"
17925 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
17927 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
17929 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
" + 8] = (etiss_int64)cast_0;\n"
17930 #if RISCV64_DEBUG_CALL
17931 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
" + 8] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
" + 8]); \n"
17963 partInit.
code() = std::string(
"//c.addw\n")+
17964 "etiss_uint32 temp = 0;\n"
17965 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
17966 #if RISCV64_Pipeline1
17967 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17968 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17969 "etiss_uint32 num_stages = 4;\n"
17970 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17971 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17973 #if RISCV64_Pipeline2
17974 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17975 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17976 "etiss_uint32 num_stages = 4;\n"
17977 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17978 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17981 "etiss_uint32 res = 0;\n"
17983 "res = (*((RISCV64*)cpu)->X[" +
toString(
rd) +
" + 8] & 0xffffffff) + (*((RISCV64*)cpu)->X[" +
toString(rs2) +
" + 8] & 0xffffffff);\n"
17984 #if RISCV64_DEBUG_CALL
17985 "printf(\"res = %#x\\n\",res); \n"
17987 "etiss_int32 cast_0 = res; \n"
17988 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
17990 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
17992 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
" + 8] = (etiss_int64)cast_0;\n"
17993 #if RISCV64_DEBUG_CALL
17994 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
" + 8] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
" + 8]); \n"
18040 partInit.
code() = std::string(
"//c.j\n")+
18041 "etiss_uint32 temp = 0;\n"
18042 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
18043 #if RISCV64_Pipeline1
18044 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
18045 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
18046 "etiss_uint32 num_stages = 4;\n"
18047 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
18048 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
18050 #if RISCV64_Pipeline2
18051 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
18052 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
18053 "etiss_uint32 num_stages = 4;\n"
18054 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
18055 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
18058 "etiss_int64 imm_extended = 0;\n"
18060 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
18062 "imm_extended = 0;\n"
18063 #if RISCV64_DEBUG_CALL
18064 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
18070 "imm_extended = 4294967295;\n"
18071 #if RISCV64_DEBUG_CALL
18072 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
18074 "imm_extended = (imm_extended << 32);\n"
18075 #if RISCV64_DEBUG_CALL
18076 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
18078 "imm_extended = imm_extended + 4294963200;\n"
18079 #if RISCV64_DEBUG_CALL
18080 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
18083 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
18084 #if RISCV64_DEBUG_CALL
18085 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
18088 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
18090 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
18092 "cpu->instructionPointer = (etiss_int64)cast_0 + imm_extended;\n"
18093 #if RISCV64_DEBUG_CALL
18094 "printf(\"cpu->instructionPointer = %#lx\\n\",cpu->instructionPointer); \n"
18097 "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n"
18133 partInit.
code() = std::string(
"//c.fsd\n")+
18134 "etiss_uint32 exception = 0;\n"
18135 "etiss_uint32 temp = 0;\n"
18136 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
18137 #if RISCV64_Pipeline1
18138 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
18139 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
18140 "etiss_uint32 num_stages = 4;\n"
18141 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
18142 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
18144 #if RISCV64_Pipeline2
18145 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
18146 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
18147 "etiss_uint32 num_stages = 4;\n"
18148 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
18149 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
18152 "etiss_uint64 offs = 0;\n"
18154 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
" + 8] + " +
toString(uimm) +
";\n"
18155 #if RISCV64_DEBUG_CALL
18156 "printf(\"offs = %#lx\\n\",offs); \n"
18158 "etiss_uint64 MEM_offs;\n"
18159 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
18160 "MEM_offs = (((RISCV64*)cpu)->F[" +
toString(rs2) +
" + 8] & 0xffffffffffffffff);\n"
18161 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n"
18162 #if RISCV64_DEBUG_CALL
18163 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
18165 "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
18167 "((RISCV64*)cpu)->RES = 0;\n"
18168 #if RISCV64_DEBUG_CALL
18169 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
18176 "return exception;\n"
18206 partInit.
code() = std::string(
"//c.fsdsp\n")+
18207 "etiss_uint32 exception = 0;\n"
18208 "etiss_uint32 temp = 0;\n"
18209 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
18210 #if RISCV64_Pipeline1
18211 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
18212 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
18213 "etiss_uint32 num_stages = 4;\n"
18214 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
18215 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
18217 #if RISCV64_Pipeline2
18218 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
18219 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
18220 "etiss_uint32 num_stages = 4;\n"
18221 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
18222 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
18225 "etiss_uint64 offs = 0;\n"
18227 "offs = *((RISCV64*)cpu)->X[2] + " +
toString(uimm) +
";\n"
18228 #if RISCV64_DEBUG_CALL
18229 "printf(\"offs = %#lx\\n\",offs); \n"
18231 "etiss_uint64 MEM_offs;\n"
18232 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
18233 "MEM_offs = (((RISCV64*)cpu)->F[" +
toString(rs2) +
"] & 0xffffffffffffffff);\n"
18234 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n"
18235 #if RISCV64_DEBUG_CALL
18236 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
18238 "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
18240 "((RISCV64*)cpu)->RES = 0;\n"
18241 #if RISCV64_DEBUG_CALL
18242 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
18249 "return exception;\n"
18287 partInit.
code() = std::string(
"//c.bnez\n")+
18288 "etiss_uint32 temp = 0;\n"
18289 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
18290 #if RISCV64_Pipeline1
18291 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
18292 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
18293 "etiss_uint32 num_stages = 4;\n"
18294 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
18295 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
18297 #if RISCV64_Pipeline2
18298 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
18299 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
18300 "etiss_uint32 num_stages = 4;\n"
18301 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
18302 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
18305 "etiss_int64 imm_extended = 0;\n"
18306 "etiss_int64 choose1 = 0;\n"
18308 "if((" +
toString(imm) +
" & 0x100)>>8 == 0)\n"
18310 "imm_extended = 0;\n"
18311 #if RISCV64_DEBUG_CALL
18312 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
18318 "imm_extended = 4294967295;\n"
18319 #if RISCV64_DEBUG_CALL
18320 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
18322 "imm_extended = (imm_extended << 32);\n"
18323 #if RISCV64_DEBUG_CALL
18324 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
18326 "imm_extended = imm_extended + 4294966784;\n"
18327 #if RISCV64_DEBUG_CALL
18328 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
18331 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
18332 #if RISCV64_DEBUG_CALL
18333 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
18335 "if(*((RISCV64*)cpu)->X[" +
toString(rs1) +
" + 8] != 0)\n"
18338 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
18340 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
18342 "choose1 = (etiss_int64)cast_0 + imm_extended;\n"
18343 #if RISCV64_DEBUG_CALL
18344 "printf(\"choose1 = %#lx\\n\",choose1); \n"
18353 #if RISCV64_DEBUG_CALL
18354 "printf(\"choose1 = %#lx\\n\",choose1); \n"
18357 "cpu->instructionPointer = choose1;\n"
18358 #if RISCV64_DEBUG_CALL
18359 "printf(\"cpu->instructionPointer = %#lx\\n\",cpu->instructionPointer); \n"
18362 "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n"
18398 partInit.
code() = std::string(
"//c.sd\n")+
18399 "etiss_uint32 exception = 0;\n"
18400 "etiss_uint32 temp = 0;\n"
18401 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
18402 #if RISCV64_Pipeline1
18403 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
18404 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
18405 "etiss_uint32 num_stages = 4;\n"
18406 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
18407 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
18409 #if RISCV64_Pipeline2
18410 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
18411 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
18412 "etiss_uint32 num_stages = 4;\n"
18413 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
18414 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
18417 "etiss_uint64 offs = 0;\n"
18419 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
" + 8] + " +
toString(uimm) +
";\n"
18420 #if RISCV64_DEBUG_CALL
18421 "printf(\"offs = %#lx\\n\",offs); \n"
18423 "etiss_uint64 MEM_offs;\n"
18424 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
18425 "MEM_offs = *((RISCV64*)cpu)->X[" +
toString(rs2) +
" + 8];\n"
18426 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n"
18427 #if RISCV64_DEBUG_CALL
18428 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
18430 "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
18432 "((RISCV64*)cpu)->RES = 0;\n"
18433 #if RISCV64_DEBUG_CALL
18434 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
18441 "return exception;\n"
18471 partInit.
code() = std::string(
"//c.sdsp\n")+
18472 "etiss_uint32 exception = 0;\n"
18473 "etiss_uint32 temp = 0;\n"
18474 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
18475 #if RISCV64_Pipeline1
18476 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
18477 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
18478 "etiss_uint32 num_stages = 4;\n"
18479 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
18480 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
18482 #if RISCV64_Pipeline2
18483 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
18484 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
18485 "etiss_uint32 num_stages = 4;\n"
18486 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
18487 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
18490 "etiss_uint64 offs = 0;\n"
18492 "offs = *((RISCV64*)cpu)->X[2] + " +
toString(uimm) +
";\n"
18493 #if RISCV64_DEBUG_CALL
18494 "printf(\"offs = %#lx\\n\",offs); \n"
18496 "etiss_uint64 MEM_offs;\n"
18497 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
18498 "MEM_offs = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
18499 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n"
18500 #if RISCV64_DEBUG_CALL
18501 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
18503 "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
18505 "((RISCV64*)cpu)->RES = 0;\n"
18506 #if RISCV64_DEBUG_CALL
18507 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
18514 "return exception;\n"
static InstructionDefinition fmsub_d_rd_frs1_frs2_frs3(ISA32_RISCV64, "fmsub.d",(uint32_t) 0x2000047,(uint32_t) 0x600007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rs3=0;static BitArrayRange R_rs3_0(31, 27);etiss_uint64 rs3_0=R_rs3_0.read(ba);rs3+=rs3_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fmsub.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 choose1 = 0;\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "res = fmadd_d((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F["+toString(rs2)+"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F["+toString(rs3)+"] & 0xffffffffffffffff), (etiss_uint32)1, choose1);\n" "if(64 == 64)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 64) | res);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition amomin_d_rd_rs1_rs2_aqu_aq_rel_rl_(ISA32_RISCV64, "amomin.d",(uint32_t) 0x8000302f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 aq=0;static BitArrayRange R_aq_0(26, 26);etiss_uint64 aq_0=R_aq_0.read(ba);aq+=aq_0;etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rl=0;static BitArrayRange R_rl_0(25, 25);etiss_uint64 rl_0=R_rl_0.read(ba);rl+=rl_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//amomin.d\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "etiss_int64 res1 = 0;\n" "etiss_uint64 res2 = 0;\n" "etiss_uint64 choose1 = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n" "etiss_int64 cast_0 = MEM_offs; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "res1 = (etiss_int64)cast_0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = res1;\n" "}\n" "etiss_int64 cast_1 = *((RISCV64*)cpu)->X["+toString(rs2)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n" "}\n" "etiss_int64 cast_2 = res1; \n" "if((etiss_int64)((etiss_uint64)cast_2 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_2 =0x0 + (etiss_uint64)cast_2 ;\n" "}\n" "if((etiss_int64)cast_2 > (etiss_int64)cast_1)\n" "{\n" "choose1 = *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "}\n" "else\n" "{\n" "choose1 = res1;\n" "}\n" "res2 = choose1;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = res2;\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n" "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition csrrw_rd_csr_rs1(ISA32_RISCV64, "csrrw",(uint32_t) 0x1073,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 csr=0;static BitArrayRange R_csr_0(31, 20);etiss_uint64 csr_0=R_csr_0.read(ba);csr+=csr_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//csrrw\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 mAddr = 0;\n" "etiss_int64 writeMask = 0;\n" "etiss_int64 writeMaskU = 0;\n" "etiss_int64 sAddr = 0;\n" "etiss_int64 writeMaskS = 0;\n" "etiss_int64 uAddr = 0;\n" "etiss_uint64 rs_val = 0;\n" "etiss_uint64 csr_val = 0;\n" "etiss_int64 writeMaskM = 0;\n" "rs_val = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "if("+toString(rd)+" != 0)\n" "{\n" "csr_val = ((RISCV64*)cpu)->CSR["+toString(csr)+"];\n" "if((("+toString(csr)+" == 0) || ("+toString(csr)+" == 256)) || ("+toString(csr)+" == 768))\n" "{\n" "uAddr = 0;\n" "sAddr = 256;\n" "mAddr = 768;\n" "writeMaskM = -9223372036846388805;\n" "writeMaskS = -9223372036853866189;\n" "writeMaskU = -9223372036853866479;\n" "}\n" "if((("+toString(csr)+" == 68) || ("+toString(csr)+" == 324)) || ("+toString(csr)+" == 836))\n" "{\n" "uAddr = 68;\n" "sAddr = 324;\n" "mAddr = 836;\n" "writeMaskM = 3003;\n" "writeMaskS = 819;\n" "writeMaskU = 273;\n" "}\n" "if((("+toString(csr)+" == 4) || ("+toString(csr)+" == 260)) || ("+toString(csr)+" == 772))\n" "{\n" "uAddr = 4;\n" "sAddr = 260;\n" "mAddr = 772;\n" "writeMaskM = 3003;\n" "writeMaskS = 819;\n" "writeMaskU = 273;\n" "}\n" "if(uAddr != sAddr)\n" "{\n" "if(((RISCV64*)cpu)->CSR[3088] == 3)\n" "{\n" "writeMask = writeMaskM;\n" "}\n" "if(((RISCV64*)cpu)->CSR[3088] == 1)\n" "{\n" "writeMask = writeMaskS;\n" "}\n" "if(((RISCV64*)cpu)->CSR[3088] == 0)\n" "{\n" "writeMask = writeMaskU;\n" "}\n" "((RISCV64*)cpu)->CSR[uAddr] = ((((RISCV64*)cpu)->CSR[uAddr] & ~writeMask) | (rs_val & writeMask))&0xffffffffffffffff;\n" "((RISCV64*)cpu)->CSR[sAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n" "((RISCV64*)cpu)->CSR[mAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n" "}\n" "else\n" "{\n" "((RISCV64*)cpu)->CSR["+toString(csr)+"] = rs_val;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = csr_val;\n" "}\n" "else\n" "{\n" "if((("+toString(csr)+" == 0) || ("+toString(csr)+" == 256)) || ("+toString(csr)+" == 768))\n" "{\n" "uAddr = 0;\n" "sAddr = 256;\n" "mAddr = 768;\n" "writeMaskM = -9223372036846388805;\n" "writeMaskS = -9223372036853866189;\n" "writeMaskU = -9223372036853866479;\n" "}\n" "if((("+toString(csr)+" == 68) || ("+toString(csr)+" == 324)) || ("+toString(csr)+" == 836))\n" "{\n" "uAddr = 68;\n" "sAddr = 324;\n" "mAddr = 836;\n" "writeMaskM = 3003;\n" "writeMaskS = 819;\n" "writeMaskU = 273;\n" "}\n" "if((("+toString(csr)+" == 4) || ("+toString(csr)+" == 260)) || ("+toString(csr)+" == 772))\n" "{\n" "uAddr = 4;\n" "sAddr = 260;\n" "mAddr = 772;\n" "writeMaskM = 3003;\n" "writeMaskS = 819;\n" "writeMaskU = 273;\n" "}\n" "if(uAddr != sAddr)\n" "{\n" "if(((RISCV64*)cpu)->CSR[3088] == 3)\n" "{\n" "writeMask = writeMaskM;\n" "}\n" "if(((RISCV64*)cpu)->CSR[3088] == 1)\n" "{\n" "writeMask = writeMaskS;\n" "}\n" "if(((RISCV64*)cpu)->CSR[3088] == 0)\n" "{\n" "writeMask = writeMaskU;\n" "}\n" "((RISCV64*)cpu)->CSR[uAddr] = ((((RISCV64*)cpu)->CSR[uAddr] & ~writeMask) | (rs_val & writeMask))&0xffffffffffffffff;\n" "((RISCV64*)cpu)->CSR[sAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n" "((RISCV64*)cpu)->CSR[mAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n" "}\n" "else\n" "{\n" "((RISCV64*)cpu)->CSR["+toString(csr)+"] = rs_val;\n" "}\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition lwu_rd_imm_rs1_(ISA32_RISCV64, "lwu",(uint32_t) 0x6003,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_int64 imm=0;static BitArrayRange R_imm_0(31, 20);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//lwu\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 offs = 0;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "offs = (etiss_int64)cast_0 + imm_extended;\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_uint32 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_uint64)MEM_offs;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition subw_(ISA32_RISCV64, "subw",(uint32_t) 0x4000003b,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//subw\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 res = 0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "res = (*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff) - (*((RISCV64*)cpu)->X["+toString(rs2)+"] & 0xffffffff);\n" "etiss_int32 cast_0 = res; \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fmv_d_x_rd_rs1(ISA32_RISCV64, "fmv.d.x",(uint32_t) 0xf2000053,(uint32_t) 0xfff0707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fmv.d.x\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = (etiss_uint64)*((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fdiv_d_rd_frs1_frs2(ISA32_RISCV64, "fdiv.d",(uint32_t) 0x1a000053,(uint32_t) 0xfe00007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fdiv.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 choose1 = 0;\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "res = fdiv_d((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F["+toString(rs2)+"] & 0xffffffffffffffff), choose1);\n" "if(64 == 64)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 64) | res);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition flt_d_rd_frs1_frs2(ISA32_RISCV64, "flt.d",(uint32_t) 0xa2001053,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//flt.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 flags = 0;\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_uint64)fcmp_d((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F["+toString(rs2)+"] & 0xffffffffffffffff), (etiss_uint32)2);\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition sb_rs2_imm_rs1_(ISA32_RISCV64, "sb",(uint32_t) 0x23,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_int64 imm=0;static BitArrayRange R_imm_5(31, 25);etiss_int64 imm_5=R_imm_5.read(ba);imm+=imm_5<< 5;static BitArrayRange R_imm_0(11, 7);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//sb\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 offs = 0;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "offs = (etiss_int64)cast_0 + imm_extended;\n" "etiss_uint8 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,1);\n" "if((offs + 1 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition lw_rd_imm_rs1_(ISA32_RISCV64, "lw",(uint32_t) 0x2003,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_int64 imm=0;static BitArrayRange R_imm_0(31, 20);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//lw\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 offs = 0;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "offs = (etiss_int64)cast_0 + imm_extended;\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_uint32 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n" "etiss_int32 cast_1 = MEM_offs; \n" "if((etiss_int32)((etiss_uint32)cast_1 - 0x80000000) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint32)cast_1 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_1;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition slt_rd_rs1_rs2(ISA32_RISCV64, "slt",(uint32_t) 0x2033,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//slt\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int8 choose1 = 0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs2)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "etiss_int64 cast_1 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n" "}\n" "if((etiss_int64)cast_1 < (etiss_int64)cast_0)\n" "{\n" "choose1 = 1;\n" "}\n" "else\n" "{\n" "choose1 = 0;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = choose1;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
etiss::instr::InstructionGroup ISA32_RISCV64("ISA32_RISCV64", 32)
static InstructionDefinition fcvt_l_s_rd_frs1(ISA32_RISCV64, "fcvt.l.s",(uint32_t) 0xc0200053,(uint32_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fcvt.l.s\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "etiss_uint32 flags = 0;\n" "res = fcvt_32_64(unbox_s(((RISCV64*)cpu)->F["+toString(rs1)+"]), (etiss_uint32)0, ("+toString(rm)+" & 0xff));\n" "etiss_int64 cast_0 = res; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition divu_rd_rs1_rs2(ISA32_RISCV64, "divu",(uint32_t) 0x2005033,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//divu\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "if("+toString(rd)+" != 0)\n" "{\n" "if(*((RISCV64*)cpu)->X["+toString(rs2)+"] != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (*((RISCV64*)cpu)->X["+toString(rs1)+"] / *((RISCV64*)cpu)->X["+toString(rs2)+"]);\n" "}\n" "else\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = - 1;\n" "}\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fsqrt_d_rd_frs1(ISA32_RISCV64, "fsqrt.d",(uint32_t) 0x5a000053,(uint32_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fsqrt.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 choose1 = 0;\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "res = fsqrt_d((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffffffffffff), choose1);\n" "if(64 == 64)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 64) | res);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition sc_w_rd_rs1_rs2(ISA32_RISCV64, "sc.w",(uint32_t) 0x1800202f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 aq=0;static BitArrayRange R_aq_0(26, 26);etiss_uint64 aq_0=R_aq_0.read(ba);aq+=aq_0;etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rl=0;static BitArrayRange R_rl_0(25, 25);etiss_uint64 rl_0=R_rl_0.read(ba);rl+=rl_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//sc.w\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "if(offs == ((RISCV64*)cpu)->RES)\n" "{\n" "etiss_uint32 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = 0;\n" "}\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "else\n" "{\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = 1;\n" "}\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition fadd_d_rd_frs1_frs2(ISA32_RISCV64, "fadd.d",(uint32_t) 0x2000053,(uint32_t) 0xfe00007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fadd.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 choose1 = 0;\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "res = fadd_d((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F["+toString(rs2)+"] & 0xffffffffffffffff), choose1);\n" "if(64 == 64)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 64) | res);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition sd_rs2_imm_rs1_(ISA32_RISCV64, "sd",(uint32_t) 0x3023,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_int64 imm=0;static BitArrayRange R_imm_5(31, 25);etiss_int64 imm_5=R_imm_5.read(ba);imm+=imm_5<< 5;static BitArrayRange R_imm_0(11, 7);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//sd\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 offs = 0;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "offs = (etiss_int64)cast_0 + imm_extended;\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n" "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition sltu_rd_rs1_rs2(ISA32_RISCV64, "sltu",(uint32_t) 0x3033,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//sltu\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int8 choose1 = 0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "if((etiss_uint64)*((RISCV64*)cpu)->X["+toString(rs1)+"] < (etiss_uint64)*((RISCV64*)cpu)->X["+toString(rs2)+"])\n" "{\n" "choose1 = 1;\n" "}\n" "else\n" "{\n" "choose1 = 0;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = choose1;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
const std::string & getLastAssignedCoreName()
RegisterSet & getAffectedRegisters()
static InstructionDefinition add_rd_rs1_rs2(ISA32_RISCV64, "add",(uint32_t) 0x33,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//add\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = *((RISCV64*)cpu)->X["+toString(rs1)+"] + *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition srai_rd_rs1_shamt(ISA32_RISCV64, "srai",(uint32_t) 0x40005013,(uint32_t) 0xfc00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 shamt=0;static BitArrayRange R_shamt_0(25, 20);etiss_uint64 shamt_0=R_shamt_0.read(ba);shamt+=shamt_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//srai\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = ((etiss_int64)cast_0 >> "+toString(shamt)+");\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
endif() endforeach() unset(LOCAL_SOURCE1) unset(LOCAL_SOURCE2) set(ETISS_HEADER $
static InstructionDefinition slliw_rd_rs1_shamt(ISA32_RISCV64, "slliw",(uint32_t) 0x101b,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 shamt=0;static BitArrayRange R_shamt_0(24, 20);etiss_uint64 shamt_0=R_shamt_0.read(ba);shamt+=shamt_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//slliw\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 sh_val = 0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "sh_val = ((*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff) << "+toString(shamt)+");\n" "etiss_int32 cast_0 = sh_val; \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition c_addi_rs1_imm(ISA16_RISCV64, "c.addi",(uint16_t) 0x1,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(11, 7);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_int64 imm=0;static BitArrayRange R_imm_5(12, 12);etiss_int64 imm_5=R_imm_5.read(ba);imm+=imm_5<< 5;static BitArrayRange R_imm_0(6, 2);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.addi\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x20)>>5 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294967232;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rs1)+"] = (etiss_int64)cast_0 + imm_extended;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition div_rd_rs1_rs2(ISA32_RISCV64, "div",(uint32_t) 0x2004033,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//div\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int8 XLM1 = 0;\n" "etiss_int64 MMIN = 0;\n" "etiss_int64 M1 = 0;\n" "etiss_int64 ONE = 0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "if(*((RISCV64*)cpu)->X["+toString(rs2)+"] != 0)\n" "{\n" "M1 = - 1;\n" "XLM1 = 64 - 1;\n" "ONE = 1;\n" "MMIN = (ONE << XLM1);\n" "if((*((RISCV64*)cpu)->X["+toString(rs1)+"] == MMIN) && (*((RISCV64*)cpu)->X["+toString(rs2)+"] == M1))\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = MMIN;\n" "}\n" "else\n" "{\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs2)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "etiss_int64 cast_1 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = ((etiss_int64)cast_1 / (etiss_int64)cast_0);\n" "}\n" "}\n" "else\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = - 1;\n" "}\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
#define RISCV64_Pipeline2
const MM_EXPORT int32_t NOERROR
static InstructionDefinition c_addiw_rs1_imm(ISA16_RISCV64, "c.addiw",(uint16_t) 0x2001,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(11, 7);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_int64 imm=0;static BitArrayRange R_imm_5(12, 12);etiss_int64 imm_5=R_imm_5.read(ba);imm+=imm_5<< 5;static BitArrayRange R_imm_0(6, 2);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.addiw\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "etiss_int32 res = 0;\n" "if(("+toString(imm)+" & 0x20)>>5 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294967232;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "if("+toString(rs1)+" != 0)\n" "{\n" "etiss_int64 cast_0 = (*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff); \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "res = (etiss_int32)cast_0 + imm_extended;\n" "etiss_int32 cast_1 = res; \n" "if((etiss_int32)((etiss_uint32)cast_1 - 0x80000000) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint32)cast_1 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rs1)+"] = (etiss_int64)cast_1;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition ecall_(ISA32_RISCV64, "ecall",(uint32_t) 0x73,(uint32_t) 0xffffffff, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//ecall\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "exception = ETISS_RETURNCODE_SYSCALL; \n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition c_addi16sp_imm(ISA16_RISCV64, "c.addi16sp",(uint16_t) 0x6101,(uint16_t) 0xef83, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_int64 imm=0;static BitArrayRange R_imm_9(12, 12);etiss_int64 imm_9=R_imm_9.read(ba);imm+=imm_9<< 9;static BitArrayRange R_imm_4(6, 6);etiss_int64 imm_4=R_imm_4.read(ba);imm+=imm_4<< 4;static BitArrayRange R_imm_6(5, 5);etiss_int64 imm_6=R_imm_6.read(ba);imm+=imm_6<< 6;static BitArrayRange R_imm_7(4, 3);etiss_int64 imm_7=R_imm_7.read(ba);imm+=imm_7<< 7;static BitArrayRange R_imm_5(2, 2);etiss_int64 imm_5=R_imm_5.read(ba);imm+=imm_5<< 5;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[2], 64);partInit.getAffectedRegisters().add(reg_name[2], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.addi16sp\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x200)>>9 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294966272;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[2]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X[2] = (etiss_int64)cast_0 + imm_extended;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fcvt_d_s_rd_frs1(ISA32_RISCV64, "fcvt.d.s",(uint32_t) 0x42000053,(uint32_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fcvt.d.s\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "etiss_int64 upper = 0;\n" "res = fconv_f2d((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffff), ("+toString(rm)+" & 0xff));\n" "if(64 == 64)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 64) | res);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition mret_(ISA32_RISCV64, "mret",(uint32_t) 0x30200073,(uint32_t) 0xffffffff, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//mret\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "((RISCV64*)cpu)->CSR[3088] = (((RISCV64*)cpu)->CSR[768] & 0x1800)>>11;\n" "((RISCV64*)cpu)->CSR[768] ^= (((RISCV64*)cpu)->CSR[768] & 0x1800);\n" "((RISCV64*)cpu)->CSR[768] ^= ((etiss_uint32)((((RISCV64*)cpu)->CSR[768] & 0x80)>>4)) ^ (((RISCV64*)cpu)->CSR[768] & 0x8);\n" "cpu->instructionPointer = ((RISCV64*)cpu)->CSR[833];\n" "((RISCV64*)cpu)->CSR[0]= ((RISCV64*)cpu)->CSR[768];\n" "((RISCV64*)cpu)->CSR[256]=((RISCV64*)cpu)->CSR[768];\n" "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n" "return 0;\n" ;return true;}, 0, nullptr)
static InstructionDefinition c_ldsp_rd_uimm_sp_(ISA16_RISCV64, "c.ldsp",(uint16_t) 0x6002,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 uimm=0;static BitArrayRange R_uimm_5(12, 12);etiss_uint64 uimm_5=R_uimm_5.read(ba);uimm+=uimm_5<< 5;static BitArrayRange R_uimm_3(6, 5);etiss_uint64 uimm_3=R_uimm_3.read(ba);uimm+=uimm_3<< 3;static BitArrayRange R_uimm_6(4, 2);etiss_uint64 uimm_6=R_uimm_6.read(ba);uimm+=uimm_6<< 6;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[2], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.ldsp\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "offs = *((RISCV64*)cpu)->X[2] + "+toString(uimm)+";\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n" "etiss_int64 cast_0 = MEM_offs; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition slti_rd_rs1_imm(ISA32_RISCV64, "slti",(uint32_t) 0x2013,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_int64 imm=0;static BitArrayRange R_imm_0(31, 20);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//slti\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "etiss_int8 choose1 = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_int64 cast_0 = imm_extended; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "etiss_int64 cast_1 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n" "}\n" "if((etiss_int64)cast_1 < (etiss_int64)cast_0)\n" "{\n" "choose1 = 1;\n" "}\n" "else\n" "{\n" "choose1 = 0;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = choose1;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition xori_rd_rs1_imm(ISA32_RISCV64, "xori",(uint32_t) 0x4013,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_int64 imm=0;static BitArrayRange R_imm_0(31, 20);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//xori\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = ((etiss_int64)cast_0 ^ imm_extended);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition bne_rs1_rs2_imm(ISA32_RISCV64, "bne",(uint32_t) 0x1063,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_int64 imm=0;static BitArrayRange R_imm_12(31, 31);etiss_int64 imm_12=R_imm_12.read(ba);imm+=imm_12<< 12;static BitArrayRange R_imm_5(30, 25);etiss_int64 imm_5=R_imm_5.read(ba);imm+=imm_5<< 5;static BitArrayRange R_imm_1(11, 8);etiss_int64 imm_1=R_imm_1.read(ba);imm+=imm_1<< 1;static BitArrayRange R_imm_11(7, 7);etiss_int64 imm_11=R_imm_11.read(ba);imm+=imm_11<< 11;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//bne\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "etiss_int64 choose1 = 0;\n" "if(("+toString(imm)+" & 0x1000)>>12 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294959104;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "if(*((RISCV64*)cpu)->X["+toString(rs1)+"] != *((RISCV64*)cpu)->X["+toString(rs2)+"])\n" "{\n" "etiss_int64 cast_0 = "+toString((uint64_t) ic.current_address_)+"ULL ; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "choose1 = (etiss_int64)cast_0 + imm_extended;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "}\n" "else\n" "{\n" "choose1 = "+toString((uint64_t) ic.current_address_)+"ULL + 4;\n" "}\n" "cpu->instructionPointer = choose1;\n" "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n" "return 0;\n" ;return true;}, 0, nullptr)
static InstructionDefinition fcvt_s_lu_rd_xrs1(ISA32_RISCV64, "fcvt.s.lu",(uint32_t) 0xd0300053,(uint32_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fcvt.s.lu\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 res = 0;\n" "etiss_int64 upper = 0;\n" "res = fcvt_64_32(*((RISCV64*)cpu)->X["+toString(rs1)+"], (etiss_uint32)3);\n" "if(64 == 32)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 32) | (etiss_uint64)res);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fnmsub_s_rd_frs1_frs2_frs3(ISA32_RISCV64, "fnmsub.s",(uint32_t) 0x4b,(uint32_t) 0x600007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rs3=0;static BitArrayRange R_rs3_0(31, 27);etiss_uint64 rs3_0=R_rs3_0.read(ba);rs3+=rs3_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fnmsub.s\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 frs1 = 0;\n" "etiss_uint32 choose1 = 0;\n" "etiss_uint32 frs2 = 0;\n" "etiss_uint32 frs3 = 0;\n" "if(64 == 32)\n" "{\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = fmadd_s(((RISCV64*)cpu)->F["+toString(rs1)+"], ((RISCV64*)cpu)->F["+toString(rs2)+"], ((RISCV64*)cpu)->F["+toString(rs3)+"], (etiss_uint32)3, choose1);\n" "}\n" "else\n" "{\n" "frs1 = unbox_s(((RISCV64*)cpu)->F["+toString(rs1)+"]);\n" "frs2 = unbox_s(((RISCV64*)cpu)->F["+toString(rs2)+"]);\n" "frs3 = unbox_s(((RISCV64*)cpu)->F["+toString(rs3)+"]);\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "res = fmadd_s(frs1, frs2, frs3, (etiss_uint32)3, choose1);\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 32) | (etiss_uint64)res);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition c_addw_8_rd_8_rd_8_rs2(ISA16_RISCV64, "c.addw",(uint16_t) 0x9c21,(uint16_t) 0xfc63, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(4, 2);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(9, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rd+8], 64);partInit.getRegisterDependencies().add(reg_name[rs2+8], 64);partInit.getAffectedRegisters().add(reg_name[rd+8], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.addw\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 res = 0;\n" "res = (*((RISCV64*)cpu)->X["+toString(rd)+" + 8] & 0xffffffff) + (*((RISCV64*)cpu)->X["+toString(rs2)+" + 8] & 0xffffffff);\n" "etiss_int32 cast_0 = res; \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+" + 8] = (etiss_int64)cast_0;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" ;return true;}, 0, nullptr)
this class contains parameters that persist in between instruction lookpus/translation within a trans...
static InstructionDefinition lr_w_rd_rs1(ISA32_RISCV64, "lr.w",(uint32_t) 0x1000202f,(uint32_t) 0xf9f0707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 aq=0;static BitArrayRange R_aq_0(26, 26);etiss_uint64 aq_0=R_aq_0.read(ba);aq+=aq_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rl=0;static BitArrayRange R_rl_0(25, 25);etiss_uint64 rl_0=R_rl_0.read(ba);rl+=rl_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//lr.w\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "etiss_uint32 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n" "etiss_int32 cast_0 = MEM_offs; \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "((RISCV64*)cpu)->RES = offs;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition amoxor_d_rd_rs1_rs2_aqu_aq_rel_rl_(ISA32_RISCV64, "amoxor.d",(uint32_t) 0x2000302f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 aq=0;static BitArrayRange R_aq_0(26, 26);etiss_uint64 aq_0=R_aq_0.read(ba);aq+=aq_0;etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rl=0;static BitArrayRange R_rl_0(25, 25);etiss_uint64 rl_0=R_rl_0.read(ba);rl+=rl_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//amoxor.d\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "etiss_int64 res = 0;\n" "etiss_uint64 res2 = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n" "etiss_int64 cast_0 = MEM_offs; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "res = (etiss_int64)cast_0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = res;\n" "}\n" "res2 = (res ^ *((RISCV64*)cpu)->X["+toString(rs2)+"]);\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = res2;\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n" "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
void add(const RegisterPart &rp)
add a registerPart to the set or just its relevant bits if a register with the same name is already p...
static InstructionDefinition xor_rd_rs1_rs2(ISA32_RISCV64, "xor",(uint32_t) 0x4033,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//xor\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (*((RISCV64*)cpu)->X["+toString(rs1)+"] ^ *((RISCV64*)cpu)->X["+toString(rs2)+"]);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition csrrwi_rd_csr_zimm(ISA32_RISCV64, "csrrwi",(uint32_t) 0x5073,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 csr=0;static BitArrayRange R_csr_0(31, 20);etiss_uint64 csr_0=R_csr_0.read(ba);csr+=csr_0;etiss_uint64 zimm=0;static BitArrayRange R_zimm_0(19, 15);etiss_uint64 zimm_0=R_zimm_0.read(ba);zimm+=zimm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//csrrwi\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 mAddr = 0;\n" "etiss_int64 writeMask = 0;\n" "etiss_int64 writeMaskU = 0;\n" "etiss_int64 sAddr = 0;\n" "etiss_int64 writeMaskS = 0;\n" "etiss_int64 uAddr = 0;\n" "etiss_int64 writeMaskM = 0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = ((RISCV64*)cpu)->CSR["+toString(csr)+"];\n" "}\n" "if((("+toString(csr)+" == 0) || ("+toString(csr)+" == 256)) || ("+toString(csr)+" == 768))\n" "{\n" "uAddr = 0;\n" "sAddr = 256;\n" "mAddr = 768;\n" "writeMaskM = -9223372036846388805;\n" "writeMaskS = -9223372036853866189;\n" "writeMaskU = -9223372036853866479;\n" "}\n" "if((("+toString(csr)+" == 68) || ("+toString(csr)+" == 324)) || ("+toString(csr)+" == 836))\n" "{\n" "uAddr = 68;\n" "sAddr = 324;\n" "mAddr = 836;\n" "writeMaskM = 3003;\n" "writeMaskS = 819;\n" "writeMaskU = 273;\n" "}\n" "if((("+toString(csr)+" == 4) || ("+toString(csr)+" == 260)) || ("+toString(csr)+" == 772))\n" "{\n" "uAddr = 4;\n" "sAddr = 260;\n" "mAddr = 772;\n" "writeMaskM = 3003;\n" "writeMaskS = 819;\n" "writeMaskU = 273;\n" "}\n" "if(uAddr != sAddr)\n" "{\n" "if(((RISCV64*)cpu)->CSR[3088] == 3)\n" "{\n" "writeMask = writeMaskM;\n" "}\n" "if(((RISCV64*)cpu)->CSR[3088] == 1)\n" "{\n" "writeMask = writeMaskS;\n" "}\n" "if(((RISCV64*)cpu)->CSR[3088] == 0)\n" "{\n" "writeMask = writeMaskU;\n" "}\n" "((RISCV64*)cpu)->CSR[uAddr] = ((((RISCV64*)cpu)->CSR[uAddr] & ~writeMask) | ((etiss_uint64)"+toString(zimm)+" & writeMask))&0xffffffffffffffff;\n" "((RISCV64*)cpu)->CSR[sAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n" "((RISCV64*)cpu)->CSR[mAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n" "}\n" "else\n" "{\n" "((RISCV64*)cpu)->CSR["+toString(csr)+"] = (etiss_uint64)"+toString(zimm)+";\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition c_li_rd_imm(ISA16_RISCV64, "c.li",(uint16_t) 0x4001,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_int64 imm=0;static BitArrayRange R_imm_5(12, 12);etiss_int64 imm_5=R_imm_5.read(ba);imm+=imm_5<< 5;static BitArrayRange R_imm_0(6, 2);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.li\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x20)>>5 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294967232;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "if("+toString(rd)+" == 0)\n" "{\n" "exception = ETISS_RETURNCODE_ILLEGALINSTRUCTION; \n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = imm_extended;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition mulhu_rd_rs1_rs2(ISA32_RISCV64, "mulhu",(uint32_t) 0x2003033,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//mulhu\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "res = ((etiss_uint64)*((RISCV64*)cpu)->X["+toString(rs1)+"] * (etiss_uint64)*((RISCV64*)cpu)->X["+toString(rs2)+"]);\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_uint64)(res >> 64);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fcvt_wu_d_rd_frs1(ISA32_RISCV64, "fcvt.wu.d",(uint32_t) 0xc2100053,(uint32_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fcvt.wu.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 flags = 0;\n" "etiss_int32 cast_0 = fcvt_64_32((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffffffffffff), (etiss_uint32)1, ("+toString(rm)+" & 0xff)); \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
void deleteTimer(etiss::Plugin *timer)
delete timer instance
static InstructionDefinition c_beqz_8_rs1_imm(ISA16_RISCV64, "c.beqz",(uint16_t) 0xc001,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(9, 7);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_int64 imm=0;static BitArrayRange R_imm_8(12, 12);etiss_int64 imm_8=R_imm_8.read(ba);imm+=imm_8<< 8;static BitArrayRange R_imm_3(11, 10);etiss_int64 imm_3=R_imm_3.read(ba);imm+=imm_3<< 3;static BitArrayRange R_imm_6(6, 5);etiss_int64 imm_6=R_imm_6.read(ba);imm+=imm_6<< 6;static BitArrayRange R_imm_1(4, 3);etiss_int64 imm_1=R_imm_1.read(ba);imm+=imm_1<< 1;static BitArrayRange R_imm_5(2, 2);etiss_int64 imm_5=R_imm_5.read(ba);imm+=imm_5<< 5;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1+8], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.beqz\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "etiss_int64 choose1 = 0;\n" "if(("+toString(imm)+" & 0x100)>>8 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294966784;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "if(*((RISCV64*)cpu)->X["+toString(rs1)+" + 8] == 0)\n" "{\n" "etiss_int64 cast_0 = "+toString((uint64_t) ic.current_address_)+"ULL ; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "choose1 = (etiss_int64)cast_0 + imm_extended;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" "}\n" "else\n" "{\n" "choose1 = "+toString((uint64_t) ic.current_address_)+"ULL + 2;\n" "}\n" "cpu->instructionPointer = choose1;\n" "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n" "return 0;\n" ;return true;}, 0, nullptr)
static InstructionDefinition c_sw_8_rs2_uimm_8_rs1_(ISA16_RISCV64, "c.sw",(uint16_t) 0xc000,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(4, 2);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(9, 7);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 uimm=0;static BitArrayRange R_uimm_3(12, 10);etiss_uint64 uimm_3=R_uimm_3.read(ba);uimm+=uimm_3<< 3;static BitArrayRange R_uimm_2(6, 6);etiss_uint64 uimm_2=R_uimm_2.read(ba);uimm+=uimm_2<< 2;static BitArrayRange R_uimm_6(5, 5);etiss_uint64 uimm_6=R_uimm_6.read(ba);uimm+=uimm_6<< 6;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1+8], 64);partInit.getRegisterDependencies().add(reg_name[rs2+8], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.sw\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+" + 8] + "+toString(uimm)+";\n" "etiss_uint32 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = *((RISCV64*)cpu)->X["+toString(rs2)+" + 8];\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n" "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition jal_rd_imm(ISA32_RISCV64, "jal",(uint32_t) 0x6f,(uint32_t) 0x7f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_int64 imm=0;static BitArrayRange R_imm_20(31, 31);etiss_int64 imm_20=R_imm_20.read(ba);imm+=imm_20<< 20;static BitArrayRange R_imm_1(30, 21);etiss_int64 imm_1=R_imm_1.read(ba);imm+=imm_1<< 1;static BitArrayRange R_imm_11(20, 20);etiss_int64 imm_11=R_imm_11.read(ba);imm+=imm_11<< 11;static BitArrayRange R_imm_12(19, 12);etiss_int64 imm_12=R_imm_12.read(ba);imm+=imm_12<< 12;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//jal\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x100000)>>20 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4292870144;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = "+toString((uint64_t) ic.current_address_)+"ULL + 4;\n" "}\n" "else\n" "{\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "}\n" "etiss_int64 cast_0 = "+toString((uint64_t) ic.current_address_)+"ULL ; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "cpu->instructionPointer = (etiss_int64)cast_0 + imm_extended;\n" "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n" "return 0;\n" ;return true;}, 0, nullptr)
static InstructionDefinition and_rd_rs1_rs2(ISA32_RISCV64, "and",(uint32_t) 0x7033,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//and\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (*((RISCV64*)cpu)->X["+toString(rs1)+"] & *((RISCV64*)cpu)->X["+toString(rs2)+"]);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
std::set< std::string > listenerSupportedRegisters_
static InstructionDefinition fsgnj_s_rd_frs1_frs2(ISA32_RISCV64, "fsgnj.s",(uint32_t) 0x20000053,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fsgnj.s\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 frs1 = 0;\n" "etiss_uint32 frs2 = 0;\n" "if(64 == 32)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((((RISCV64*)cpu)->F["+toString(rs1)+"] & 2147483647) | (((RISCV64*)cpu)->F["+toString(rs2)+"] & -2147483648));\n" "}\n" "else\n" "{\n" "frs1 = unbox_s(((RISCV64*)cpu)->F["+toString(rs1)+"]);\n" "frs2 = unbox_s(((RISCV64*)cpu)->F["+toString(rs2)+"]);\n" "res = ((frs1 & 2147483647) | (frs2 & -2147483648));\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 32) | (etiss_uint64)res);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition c_or_8_rd_8_rs2(ISA16_RISCV64, "c.or",(uint16_t) 0x8c41,(uint16_t) 0xfc63, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(4, 2);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(9, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rd+8], 64);partInit.getRegisterDependencies().add(reg_name[rs2+8], 64);partInit.getAffectedRegisters().add(reg_name[rd+8], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.or\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int8 rd_idx = 0;\n" "rd_idx = "+toString(rd)+" + 8;\n" "*((RISCV64*)cpu)->X[rd_idx] = (*((RISCV64*)cpu)->X[rd_idx] | *((RISCV64*)cpu)->X["+toString(rs2)+" + 8]);\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition c_ebreak_(ISA16_RISCV64, "c.ebreak",(uint16_t) 0x9002,(uint16_t) 0xffff, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.ebreak\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "return ETISS_RETURNCODE_CPUFINISHED; \n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition srliw_rd_rs1_shamt(ISA32_RISCV64, "srliw",(uint32_t) 0x501b,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 shamt=0;static BitArrayRange R_shamt_0(24, 20);etiss_uint64 shamt_0=R_shamt_0.read(ba);shamt+=shamt_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//srliw\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 sh_val = 0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "sh_val = ((*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff) >> "+toString(shamt)+");\n" "etiss_int32 cast_0 = sh_val; \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition c_bnez_8_rs1_imm(ISA16_RISCV64, "c.bnez",(uint16_t) 0xe001,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(9, 7);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_int64 imm=0;static BitArrayRange R_imm_8(12, 12);etiss_int64 imm_8=R_imm_8.read(ba);imm+=imm_8<< 8;static BitArrayRange R_imm_3(11, 10);etiss_int64 imm_3=R_imm_3.read(ba);imm+=imm_3<< 3;static BitArrayRange R_imm_6(6, 5);etiss_int64 imm_6=R_imm_6.read(ba);imm+=imm_6<< 6;static BitArrayRange R_imm_1(4, 3);etiss_int64 imm_1=R_imm_1.read(ba);imm+=imm_1<< 1;static BitArrayRange R_imm_5(2, 2);etiss_int64 imm_5=R_imm_5.read(ba);imm+=imm_5<< 5;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1+8], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.bnez\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "etiss_int64 choose1 = 0;\n" "if(("+toString(imm)+" & 0x100)>>8 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294966784;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "if(*((RISCV64*)cpu)->X["+toString(rs1)+" + 8] != 0)\n" "{\n" "etiss_int64 cast_0 = "+toString((uint64_t) ic.current_address_)+"ULL ; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "choose1 = (etiss_int64)cast_0 + imm_extended;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" "}\n" "else\n" "{\n" "choose1 = "+toString((uint64_t) ic.current_address_)+"ULL + 2;\n" "}\n" "cpu->instructionPointer = choose1;\n" "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n" "return 0;\n" ;return true;}, 0, nullptr)
static InstructionDefinition c_lwsp_rd_sp_uimm(ISA16_RISCV64, "c.lwsp",(uint16_t) 0x4002,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 uimm=0;static BitArrayRange R_uimm_5(12, 12);etiss_uint64 uimm_5=R_uimm_5.read(ba);uimm+=uimm_5<< 5;static BitArrayRange R_uimm_2(6, 4);etiss_uint64 uimm_2=R_uimm_2.read(ba);uimm+=uimm_2<< 2;static BitArrayRange R_uimm_6(3, 2);etiss_uint64 uimm_6=R_uimm_6.read(ba);uimm+=uimm_6<< 6;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[2], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.lwsp\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "offs = *((RISCV64*)cpu)->X[2] + "+toString(uimm)+";\n" "etiss_uint32 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n" "etiss_int32 cast_0 = MEM_offs; \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
provides to architecture dependent registers as defined by gdb
static InstructionDefinition fsgnjx_s_rd_frs1_frs2(ISA32_RISCV64, "fsgnjx.s",(uint32_t) 0x20002053,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fsgnjx.s\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 frs1 = 0;\n" "etiss_uint32 frs2 = 0;\n" "if(64 == 32)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = (((RISCV64*)cpu)->F["+toString(rs1)+"] ^ (((RISCV64*)cpu)->F["+toString(rs2)+"] & -2147483648));\n" "}\n" "else\n" "{\n" "frs1 = unbox_s(((RISCV64*)cpu)->F["+toString(rs1)+"]);\n" "frs2 = unbox_s(((RISCV64*)cpu)->F["+toString(rs2)+"]);\n" "res = (frs1 ^ (frs2 & -2147483648));\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 32) | (etiss_uint64)res);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
virtual ETISS_CPU * newCPU()
allocate new cpu structure
static InstructionDefinition auipc_rd_imm(ISA32_RISCV64, "auipc",(uint32_t) 0x17,(uint32_t) 0x7f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_int64 imm=0;static BitArrayRange R_imm_12(31, 12);etiss_int64 imm_12=R_imm_12.read(ba);imm+=imm_12<< 12;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//auipc\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x80000000)>>31 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_int64 cast_0 = "+toString((uint64_t) ic.current_address_)+"ULL ; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0 + imm_extended;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fcvt_s_l_rd_xrs1(ISA32_RISCV64, "fcvt.s.l",(uint32_t) 0xd0200053,(uint32_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fcvt.s.l\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 res = 0;\n" "etiss_int64 upper = 0;\n" "res = fcvt_64_32(*((RISCV64*)cpu)->X["+toString(rs1)+"], (etiss_uint32)2);\n" "if(64 == 32)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 32) | (etiss_uint64)res);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fcvt_l_d_rd_frs1(ISA32_RISCV64, "fcvt.l.d",(uint32_t) 0xc2200053,(uint32_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fcvt.l.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 flags = 0;\n" "etiss_int64 cast_0 = fcvt_d((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffffffffffff), (etiss_uint32)0, ("+toString(rm)+" & 0xff)); \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition c_lw_8_rd_uimm_8_rs1_(ISA16_RISCV64, "c.lw",(uint16_t) 0x4000,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(9, 7);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 uimm=0;static BitArrayRange R_uimm_3(12, 10);etiss_uint64 uimm_3=R_uimm_3.read(ba);uimm+=uimm_3<< 3;static BitArrayRange R_uimm_2(6, 6);etiss_uint64 uimm_2=R_uimm_2.read(ba);uimm+=uimm_2<< 2;static BitArrayRange R_uimm_6(5, 5);etiss_uint64 uimm_6=R_uimm_6.read(ba);uimm+=uimm_6<< 6;etiss_uint64 rd=0;static BitArrayRange R_rd_0(4, 2);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1+8], 64);partInit.getAffectedRegisters().add(reg_name[rd+8], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.lw\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+" + 8] + "+toString(uimm)+";\n" "etiss_uint32 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n" "etiss_int32 cast_0 = MEM_offs; \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+" + 8] = (etiss_int64)cast_0;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition remuw_rd_rs1_rs2(ISA32_RISCV64, "remuw",(uint32_t) 0x200703b,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//remuw\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "if("+toString(rd)+" != 0)\n" "{\n" "if((*((RISCV64*)cpu)->X["+toString(rs2)+"] & 0xffffffff) != 0)\n" "{\n" "etiss_int64 cast_0 = ((*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff) % (*((RISCV64*)cpu)->X["+toString(rs2)+"] & 0xffffffff)); \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "}\n" "else\n" "{\n" "etiss_int64 cast_1 = (*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff); \n" "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_1;\n" "}\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition sc_d_rd_rs1_rs2(ISA32_RISCV64, "sc.d",(uint32_t) 0x1800302f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 aq=0;static BitArrayRange R_aq_0(26, 26);etiss_uint64 aq_0=R_aq_0.read(ba);aq+=aq_0;etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rl=0;static BitArrayRange R_rl_0(25, 25);etiss_uint64 rl_0=R_rl_0.read(ba);rl+=rl_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//sc.d\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "if(offs == ((RISCV64*)cpu)->RES)\n" "{\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = 0;\n" "}\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "else\n" "{\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = 1;\n" "}\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition fmul_s_rd_frs1_frs2(ISA32_RISCV64, "fmul.s",(uint32_t) 0x10000053,(uint32_t) 0xfe00007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fmul.s\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 frs1 = 0;\n" "etiss_uint32 choose1 = 0;\n" "etiss_uint32 frs2 = 0;\n" "if(64 == 32)\n" "{\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = fmul_s(((RISCV64*)cpu)->F["+toString(rs1)+"], ((RISCV64*)cpu)->F["+toString(rs2)+"], choose1);\n" "}\n" "else\n" "{\n" "frs1 = unbox_s(((RISCV64*)cpu)->F["+toString(rs1)+"]);\n" "frs2 = unbox_s(((RISCV64*)cpu)->F["+toString(rs2)+"]);\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "res = fmul_s(frs1, frs2, choose1);\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 32) | (etiss_uint64)res);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition c_mv_rd_rs2(ISA16_RISCV64, "c.mv",(uint16_t) 0x8002,(uint16_t) 0xf003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(6, 2);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.mv\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition sllw_rd_rs1_rs2(ISA32_RISCV64, "sllw",(uint32_t) 0x103b,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//sllw\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 sh_val = 0;\n" "etiss_uint32 count = 0;\n" "etiss_int32 mask = 0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "mask = 31;\n" "count = ((*((RISCV64*)cpu)->X["+toString(rs2)+"] & 0xffffffff) & mask);\n" "sh_val = ((*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff) << count);\n" "etiss_int32 cast_0 = sh_val; \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition remu_rd_rs1_rs2(ISA32_RISCV64, "remu",(uint32_t) 0x2007033,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//remu\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "if("+toString(rd)+" != 0)\n" "{\n" "if(*((RISCV64*)cpu)->X["+toString(rs2)+"] != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (*((RISCV64*)cpu)->X["+toString(rs1)+"] % *((RISCV64*)cpu)->X["+toString(rs2)+"]);\n" "}\n" "else\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "}\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
basic cpu state structure needed for execution of any cpu architecture.
static InstructionDefinition amoadd_d_rd_rs1_rs2_aqu_aq_rel_rl_(ISA32_RISCV64, "amoadd.d",(uint32_t) 0x302f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 aq=0;static BitArrayRange R_aq_0(26, 26);etiss_uint64 aq_0=R_aq_0.read(ba);aq+=aq_0;etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rl=0;static BitArrayRange R_rl_0(25, 25);etiss_uint64 rl_0=R_rl_0.read(ba);rl+=rl_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//amoadd.d\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "etiss_int64 res = 0;\n" "etiss_uint64 res2 = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n" "etiss_int64 cast_0 = MEM_offs; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "res = (etiss_int64)cast_0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = res;\n" "}\n" "res2 = res + *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = res2;\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n" "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition fnmadd_s_rd_frs1_frs2_frs3(ISA32_RISCV64, "fnmadd.s",(uint32_t) 0x4f,(uint32_t) 0x600007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rs3=0;static BitArrayRange R_rs3_0(31, 27);etiss_uint64 rs3_0=R_rs3_0.read(ba);rs3+=rs3_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fnmadd.s\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 frs1 = 0;\n" "etiss_uint32 choose1 = 0;\n" "etiss_uint32 frs2 = 0;\n" "etiss_uint32 frs3 = 0;\n" "if(64 == 32)\n" "{\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = fmadd_s(((RISCV64*)cpu)->F["+toString(rs1)+"], ((RISCV64*)cpu)->F["+toString(rs2)+"], ((RISCV64*)cpu)->F["+toString(rs3)+"], (etiss_uint32)2, choose1);\n" "}\n" "else\n" "{\n" "frs1 = unbox_s(((RISCV64*)cpu)->F["+toString(rs1)+"]);\n" "frs2 = unbox_s(((RISCV64*)cpu)->F["+toString(rs2)+"]);\n" "frs3 = unbox_s(((RISCV64*)cpu)->F["+toString(rs3)+"]);\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "res = fmadd_s(frs1, frs2, frs3, (etiss_uint32)2, choose1);\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 32) | (etiss_uint64)res);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
uint64_t current_address_
start address of current instruction
static InstructionDefinition fnmadd_d_rd_frs1_frs2_frs3(ISA32_RISCV64, "fnmadd.d",(uint32_t) 0x200004f,(uint32_t) 0x600007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rs3=0;static BitArrayRange R_rs3_0(31, 27);etiss_uint64 rs3_0=R_rs3_0.read(ba);rs3+=rs3_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fnmadd.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 choose1 = 0;\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "res = fmadd_d((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F["+toString(rs2)+"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F["+toString(rs3)+"] & 0xffffffffffffffff), (etiss_uint32)2, choose1);\n" "if(64 == 64)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 64) | res);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
Contains a small code snipped.
static BitArrayRange rd(25, 21)
static InstructionDefinition jalr_rd_rs1_imm(ISA32_RISCV64, "jalr",(uint32_t) 0x67,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_int64 imm=0;static BitArrayRange R_imm_0(31, 20);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//jalr\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "etiss_int64 new_pc = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "new_pc = (etiss_int64)cast_0 + imm_extended;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = "+toString((uint64_t) ic.current_address_)+"ULL + 4;\n" "}\n" "else\n" "{\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "}\n" "cpu->instructionPointer = (new_pc & ~1)&0xffffffffffffffff;\n" "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n" "return 0;\n" ;return true;}, 0, nullptr)
static InstructionDefinition sraiw_rd_rs1_shamt(ISA32_RISCV64, "sraiw",(uint32_t) 0x4000501b,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 shamt=0;static BitArrayRange R_shamt_0(24, 20);etiss_uint64 shamt_0=R_shamt_0.read(ba);shamt+=shamt_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//sraiw\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int32 sh_val = 0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_int64 cast_0 = (*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff); \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "sh_val = ((etiss_int32)cast_0 >> "+toString(shamt)+");\n" "etiss_int32 cast_1 = sh_val; \n" "if((etiss_int32)((etiss_uint32)cast_1 - 0x80000000) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint32)cast_1 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_1;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fcvt_w_s_rd_frs1(ISA32_RISCV64, "fcvt.w.s",(uint32_t) 0xc0000053,(uint32_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fcvt.w.s\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 frs1 = 0;\n" "if(64 == 32)\n" "{\n" "etiss_int32 cast_0 = fcvt_s(((RISCV64*)cpu)->F["+toString(rs1)+"], (etiss_uint32)0, ("+toString(rm)+" & 0xff)); \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "}\n" "else\n" "{\n" "frs1 = unbox_s(((RISCV64*)cpu)->F["+toString(rs1)+"]);\n" "etiss_int32 cast_1 = fcvt_s(frs1, (etiss_uint32)0, ("+toString(rm)+" & 0xff)); \n" "if((etiss_int32)((etiss_uint32)cast_1 - 0x80000000) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint32)cast_1 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_1;\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fcvt_wu_s_rd_frs1(ISA32_RISCV64, "fcvt.wu.s",(uint32_t) 0xc0100053,(uint32_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fcvt.wu.s\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 frs1 = 0;\n" "if(64 == 32)\n" "{\n" "etiss_int32 cast_0 = fcvt_s(((RISCV64*)cpu)->F["+toString(rs1)+"], (etiss_uint32)1, ("+toString(rm)+" & 0xff)); \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "}\n" "else\n" "{\n" "frs1 = unbox_s(((RISCV64*)cpu)->F["+toString(rs1)+"]);\n" "etiss_int32 cast_1 = fcvt_s(frs1, (etiss_uint32)1, ("+toString(rm)+" & 0xff)); \n" "if((etiss_int32)((etiss_uint32)cast_1 - 0x80000000) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint32)cast_1 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_1;\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
etiss_uint64 resourceUsages[ETISS_MAX_RESOURCES]
how many cycles each resource is used
static InstructionDefinition fsqrt_s_rd_frs1(ISA32_RISCV64, "fsqrt.s",(uint32_t) 0x58000053,(uint32_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fsqrt.s\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 frs1 = 0;\n" "etiss_uint32 choose1 = 0;\n" "if(64 == 32)\n" "{\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = fsqrt_s(((RISCV64*)cpu)->F["+toString(rs1)+"], choose1);\n" "}\n" "else\n" "{\n" "frs1 = unbox_s(((RISCV64*)cpu)->F["+toString(rs1)+"]);\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "res = fsqrt_s(frs1, choose1);\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 32) | (etiss_uint64)res);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
virtual void deleteCPU(ETISS_CPU *)
delete cpu structure
static InstructionDefinition fence_i_(ISA32_RISCV64, "fence_i",(uint32_t) 0x100f,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 imm=0;static BitArrayRange R_imm_0(31, 20);etiss_uint64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[1], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fence_i\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "((RISCV64*)cpu)->FENCE[1] = "+toString(imm)+";\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fclass_d_rd_frs1(ISA32_RISCV64, "fclass.d",(uint32_t) 0xe2001053,(uint32_t) 0xfff0707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fclass.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = fclass_d((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffffffffffff));\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
etiss_uint32 mode
instruction set mode of the processor
static InstructionDefinition lui_rd_imm(ISA32_RISCV64, "lui",(uint32_t) 0x37,(uint32_t) 0x7f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_int64 imm=0;static BitArrayRange R_imm_12(31, 12);etiss_int64 imm_12=R_imm_12.read(ba);imm+=imm_12<< 12;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//lui\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x80000000)>>31 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = imm_extended;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition amomaxu_d_rd_rs1_rs2_aqu_aq_rel_rl_(ISA32_RISCV64, "amomaxu.d",(uint32_t) 0xe000302f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 aq=0;static BitArrayRange R_aq_0(26, 26);etiss_uint64 aq_0=R_aq_0.read(ba);aq+=aq_0;etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rl=0;static BitArrayRange R_rl_0(25, 25);etiss_uint64 rl_0=R_rl_0.read(ba);rl+=rl_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//amomaxu.d\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "etiss_int64 res1 = 0;\n" "etiss_uint64 res2 = 0;\n" "etiss_uint64 choose1 = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n" "etiss_int64 cast_0 = MEM_offs; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "res1 = (etiss_int64)cast_0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = res1;\n" "}\n" "if(res1 < *((RISCV64*)cpu)->X["+toString(rs2)+"])\n" "{\n" "choose1 = *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "}\n" "else\n" "{\n" "choose1 = res1;\n" "}\n" "res2 = choose1;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = res2;\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n" "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
Acts as a view/filter to a BitArray.
static InstructionDefinition srl_rd_rs1_rs2(ISA32_RISCV64, "srl",(uint32_t) 0x5033,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//srl\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (*((RISCV64*)cpu)->X["+toString(rs1)+"] >> (*((RISCV64*)cpu)->X["+toString(rs2)+"] & 64 - 1));\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition amominu_w_rd_rs1_rs2_aqu_aq_rel_rl_(ISA32_RISCV64, "amominu.w",(uint32_t) 0xc000202f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 aq=0;static BitArrayRange R_aq_0(26, 26);etiss_uint64 aq_0=R_aq_0.read(ba);aq+=aq_0;etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rl=0;static BitArrayRange R_rl_0(25, 25);etiss_uint64 rl_0=R_rl_0.read(ba);rl+=rl_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//amominu.w\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "etiss_int64 res1 = 0;\n" "etiss_uint64 res2 = 0;\n" "etiss_uint64 choose1 = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "etiss_uint32 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n" "etiss_int32 cast_0 = MEM_offs; \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "res1 = (etiss_int64)cast_0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = res1;\n" "}\n" "if(res1 > *((RISCV64*)cpu)->X["+toString(rs2)+"])\n" "{\n" "choose1 = *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "}\n" "else\n" "{\n" "choose1 = res1;\n" "}\n" "res2 = choose1;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = res2;\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n" "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition c_srai_8_rs1_shamt(ISA16_RISCV64, "c.srai",(uint16_t) 0x8401,(uint16_t) 0xec03, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(9, 7);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 shamt=0;static BitArrayRange R_shamt_5(12, 12);etiss_uint64 shamt_5=R_shamt_5.read(ba);shamt+=shamt_5<< 5;static BitArrayRange R_shamt_0(6, 2);etiss_uint64 shamt_0=R_shamt_0.read(ba);shamt+=shamt_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1+8], 64);partInit.getAffectedRegisters().add(reg_name[rs1+8], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.srai\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int8 rs1_idx = 0;\n" "rs1_idx = "+toString(rs1)+" + 8;\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[rs1_idx]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X[rs1_idx] = ((etiss_int64)cast_0 >> "+toString(shamt)+");\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" ;return true;}, 0, nullptr)
virtual etiss::plugin::gdb::GDBCore & getGDBCore()
get the GDBcore for RISCV64 architecture
static InstructionDefinition c_fsdsp_rs2_uimm_x2_(ISA16_RISCV64, "c.fsdsp",(uint16_t) 0xa002,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(6, 2);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 uimm=0;static BitArrayRange R_uimm_3(12, 10);etiss_uint64 uimm_3=R_uimm_3.read(ba);uimm+=uimm_3<< 3;static BitArrayRange R_uimm_6(9, 7);etiss_uint64 uimm_6=R_uimm_6.read(ba);uimm+=uimm_6<< 6;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[2], 64);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.fsdsp\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "offs = *((RISCV64*)cpu)->X[2] + "+toString(uimm)+";\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = (((RISCV64*)cpu)->F["+toString(rs2)+"] & 0xffffffffffffffff);\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n" "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition sfence_vma_(ISA32_RISCV64, "sfence.vma",(uint32_t) 0x12000073,(uint32_t) 0xfe007fff, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[2], 64);partInit.getAffectedRegisters().add(reg_name[3], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//sfence.vma\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "((RISCV64*)cpu)->FENCE[2] = "+toString(rs1)+";\n" "((RISCV64*)cpu)->FENCE[3] = "+toString(rs2)+";\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition divw_rd_rs1_rs2(ISA32_RISCV64, "divw",(uint32_t) 0x200403b,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//divw\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int32 MMIN = 0;\n" "etiss_int32 M1 = 0;\n" "etiss_int32 ONE = 0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "if(*((RISCV64*)cpu)->X["+toString(rs2)+"] != 0)\n" "{\n" "M1 = - 1;\n" "ONE = 1;\n" "MMIN = (ONE << 31);\n" "if(((*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff) == MMIN) && ((*((RISCV64*)cpu)->X["+toString(rs2)+"] & 0xffffffff) == M1))\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = ( - 1 << 31);\n" "}\n" "else\n" "{\n" "etiss_int64 cast_0 = (*((RISCV64*)cpu)->X["+toString(rs2)+"] & 0xffffffff); \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "etiss_int64 cast_1 = (*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff); \n" "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n" "}\n" "etiss_int64 cast_2 = ((etiss_int64)cast_1 / (etiss_int64)cast_0); \n" "if((etiss_int64)((etiss_uint64)cast_2 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_2 =0x0 + (etiss_uint64)cast_2 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_2;\n" "}\n" "}\n" "else\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = - 1;\n" "}\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fmsub_s_rd_frs1_frs2_frs3(ISA32_RISCV64, "fmsub.s",(uint32_t) 0x47,(uint32_t) 0x600007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rs3=0;static BitArrayRange R_rs3_0(31, 27);etiss_uint64 rs3_0=R_rs3_0.read(ba);rs3+=rs3_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fmsub.s\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 frs1 = 0;\n" "etiss_uint32 choose1 = 0;\n" "etiss_uint32 frs2 = 0;\n" "etiss_uint32 frs3 = 0;\n" "if(64 == 32)\n" "{\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = fmadd_s(((RISCV64*)cpu)->F["+toString(rs1)+"], ((RISCV64*)cpu)->F["+toString(rs2)+"], ((RISCV64*)cpu)->F["+toString(rs3)+"], (etiss_uint32)1, choose1);\n" "}\n" "else\n" "{\n" "frs1 = unbox_s(((RISCV64*)cpu)->F["+toString(rs1)+"]);\n" "frs2 = unbox_s(((RISCV64*)cpu)->F["+toString(rs2)+"]);\n" "frs3 = unbox_s(((RISCV64*)cpu)->F["+toString(rs3)+"]);\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "res = fmadd_s(frs1, frs2, frs3, (etiss_uint32)1, choose1);\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 32) | (etiss_uint64)res);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fcvt_d_l_rd_rs1(ISA32_RISCV64, "fcvt.d.l",(uint32_t) 0xd2200053,(uint32_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fcvt.d.l\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "res = fcvt_d((etiss_int64)cast_0, (etiss_uint32)2, ("+toString(rm)+" & 0xff));\n" "if(64 == 64)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 64) | res);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition c_swsp_rs2_uimm_sp_(ISA16_RISCV64, "c.swsp",(uint16_t) 0xc002,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(6, 2);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 uimm=0;static BitArrayRange R_uimm_2(12, 9);etiss_uint64 uimm_2=R_uimm_2.read(ba);uimm+=uimm_2<< 2;static BitArrayRange R_uimm_6(8, 7);etiss_uint64 uimm_6=R_uimm_6.read(ba);uimm+=uimm_6<< 6;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[2], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.swsp\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "offs = *((RISCV64*)cpu)->X[2] + "+toString(uimm)+";\n" "etiss_uint32 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n" "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
etiss_uint64 instructionPointer
pointer to next instruction.
static InstructionDefinition addi_rd_rs1_imm(ISA32_RISCV64, "addi",(uint32_t) 0x13,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_int64 imm=0;static BitArrayRange R_imm_0(31, 20);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//addi\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0 + imm_extended;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition sub_rd_rs1_rs2(ISA32_RISCV64, "sub",(uint32_t) 0x40000033,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//sub\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = *((RISCV64*)cpu)->X["+toString(rs1)+"] - *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition srlw_rd_rs1_rs2(ISA32_RISCV64, "srlw",(uint32_t) 0x503b,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//srlw\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 sh_val = 0;\n" "etiss_uint32 count = 0;\n" "etiss_int32 mask = 0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "mask = 31;\n" "count = ((*((RISCV64*)cpu)->X["+toString(rs2)+"] & 0xffffffff) & mask);\n" "sh_val = ((*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff) >> count);\n" "etiss_int32 cast_0 = sh_val; \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fcvt_d_lu_rd_rs1(ISA32_RISCV64, "fcvt.d.lu",(uint32_t) 0xd2300053,(uint32_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fcvt.d.lu\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "etiss_int64 upper = 0;\n" "res = fcvt_d((etiss_uint64)*((RISCV64*)cpu)->X["+toString(rs1)+"], (etiss_uint32)3, ("+toString(rm)+" & 0xff));\n" "if(64 == 64)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 64) | res);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
int32_t tlb_overlap_handler(int32_t fault, MMU *mmu, uint64_t vma, MM_ACCESS access)
Page Table Entry (PTE) defines the composition of Page Frame Number (PFN) and relavant flags.
static InstructionDefinition fmax_s_rd_frs1_frs2(ISA32_RISCV64, "fmax.s",(uint32_t) 0x28001053,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fmax.s\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 frs1 = 0;\n" "etiss_uint32 frs2 = 0;\n" "if(64 == 32)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = fsel_s(((RISCV64*)cpu)->F["+toString(rs1)+"], ((RISCV64*)cpu)->F["+toString(rs2)+"], (etiss_uint32)1);\n" "}\n" "else\n" "{\n" "frs1 = unbox_s(((RISCV64*)cpu)->F["+toString(rs1)+"]);\n" "frs2 = unbox_s(((RISCV64*)cpu)->F["+toString(rs2)+"]);\n" "res = fsel_s(frs1, frs2, (etiss_uint32)1);\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 32) | (etiss_uint64)res);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
the interface to translate instructions of and processor architecture
static const char *const reg_name[]
static InstructionDefinition fcvt_s_w_rd_rs1(ISA32_RISCV64, "fcvt.s.w",(uint32_t) 0xd0000053,(uint32_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fcvt.s.w\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 res = 0;\n" "etiss_int64 upper = 0;\n" "if(64 == 32)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = fcvt_s((*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff), (etiss_uint32)2, ("+toString(rm)+" & 0xff));\n" "}\n" "else\n" "{\n" "res = fcvt_s((*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff), (etiss_uint32)2, ("+toString(rm)+" & 0xff));\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 32) | (etiss_uint64)res);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition amomaxu_w_rd_rs1_rs2_aqu_aq_rel_rl_(ISA32_RISCV64, "amomaxu.w",(uint32_t) 0xe000202f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 aq=0;static BitArrayRange R_aq_0(26, 26);etiss_uint64 aq_0=R_aq_0.read(ba);aq+=aq_0;etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rl=0;static BitArrayRange R_rl_0(25, 25);etiss_uint64 rl_0=R_rl_0.read(ba);rl+=rl_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//amomaxu.w\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "etiss_int64 res1 = 0;\n" "etiss_uint64 res2 = 0;\n" "etiss_uint64 choose1 = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "etiss_uint32 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n" "etiss_int32 cast_0 = MEM_offs; \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "res1 = (etiss_int64)cast_0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = res1;\n" "}\n" "if(res1 < *((RISCV64*)cpu)->X["+toString(rs2)+"])\n" "{\n" "choose1 = *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "}\n" "else\n" "{\n" "choose1 = res1;\n" "}\n" "res2 = choose1;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = res2;\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n" "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition csrrci_rd_csr_zimm(ISA32_RISCV64, "csrrci",(uint32_t) 0x7073,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 csr=0;static BitArrayRange R_csr_0(31, 20);etiss_uint64 csr_0=R_csr_0.read(ba);csr+=csr_0;etiss_uint64 zimm=0;static BitArrayRange R_zimm_0(19, 15);etiss_uint64 zimm_0=R_zimm_0.read(ba);zimm+=zimm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//csrrci\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "etiss_int64 mAddr = 0;\n" "etiss_int64 writeMask = 0;\n" "etiss_int64 writeMaskU = 0;\n" "etiss_int64 sAddr = 0;\n" "etiss_int64 writeMaskS = 0;\n" "etiss_int64 uAddr = 0;\n" "etiss_int64 writeMaskM = 0;\n" "res = ((RISCV64*)cpu)->CSR["+toString(csr)+"];\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = res;\n" "}\n" "if("+toString(zimm)+" != 0)\n" "{\n" "if((("+toString(csr)+" == 0) || ("+toString(csr)+" == 256)) || ("+toString(csr)+" == 768))\n" "{\n" "uAddr = 0;\n" "sAddr = 256;\n" "mAddr = 768;\n" "writeMaskM = -9223372036846388805;\n" "writeMaskS = -9223372036853866189;\n" "writeMaskU = -9223372036853866479;\n" "}\n" "if((("+toString(csr)+" == 68) || ("+toString(csr)+" == 324)) || ("+toString(csr)+" == 836))\n" "{\n" "uAddr = 68;\n" "sAddr = 324;\n" "mAddr = 836;\n" "writeMaskM = 3003;\n" "writeMaskS = 819;\n" "writeMaskU = 273;\n" "}\n" "if((("+toString(csr)+" == 4) || ("+toString(csr)+" == 260)) || ("+toString(csr)+" == 772))\n" "{\n" "uAddr = 4;\n" "sAddr = 260;\n" "mAddr = 772;\n" "writeMaskM = 3003;\n" "writeMaskS = 819;\n" "writeMaskU = 273;\n" "}\n" "if(uAddr != sAddr)\n" "{\n" "if(((RISCV64*)cpu)->CSR[3088] == 3)\n" "{\n" "writeMask = writeMaskM;\n" "}\n" "if(((RISCV64*)cpu)->CSR[3088] == 1)\n" "{\n" "writeMask = writeMaskS;\n" "}\n" "if(((RISCV64*)cpu)->CSR[3088] == 0)\n" "{\n" "writeMask = writeMaskU;\n" "}\n" "((RISCV64*)cpu)->CSR[uAddr] = ((((RISCV64*)cpu)->CSR[uAddr] & ~writeMask) | ((res & ~(etiss_uint64)"+toString(zimm)+") & writeMask))&0xffffffffffffffff&0xffffffffffffffff;\n" "((RISCV64*)cpu)->CSR[sAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n" "((RISCV64*)cpu)->CSR[mAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n" "}\n" "else\n" "{\n" "((RISCV64*)cpu)->CSR["+toString(csr)+"] = (res & ~(etiss_uint64)"+toString(zimm)+")&0xffffffffffffffff;\n" "}\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition csrrsi_rd_csr_zimm(ISA32_RISCV64, "csrrsi",(uint32_t) 0x6073,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 csr=0;static BitArrayRange R_csr_0(31, 20);etiss_uint64 csr_0=R_csr_0.read(ba);csr+=csr_0;etiss_uint64 zimm=0;static BitArrayRange R_zimm_0(19, 15);etiss_uint64 zimm_0=R_zimm_0.read(ba);zimm+=zimm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//csrrsi\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "etiss_int64 mAddr = 0;\n" "etiss_int64 writeMask = 0;\n" "etiss_int64 writeMaskU = 0;\n" "etiss_int64 sAddr = 0;\n" "etiss_int64 writeMaskS = 0;\n" "etiss_int64 uAddr = 0;\n" "etiss_int64 writeMaskM = 0;\n" "res = ((RISCV64*)cpu)->CSR["+toString(csr)+"];\n" "if("+toString(zimm)+" != 0)\n" "{\n" "if((("+toString(csr)+" == 0) || ("+toString(csr)+" == 256)) || ("+toString(csr)+" == 768))\n" "{\n" "uAddr = 0;\n" "sAddr = 256;\n" "mAddr = 768;\n" "writeMaskM = -9223372036846388805;\n" "writeMaskS = -9223372036853866189;\n" "writeMaskU = -9223372036853866479;\n" "}\n" "if((("+toString(csr)+" == 68) || ("+toString(csr)+" == 324)) || ("+toString(csr)+" == 836))\n" "{\n" "uAddr = 68;\n" "sAddr = 324;\n" "mAddr = 836;\n" "writeMaskM = 3003;\n" "writeMaskS = 819;\n" "writeMaskU = 273;\n" "}\n" "if((("+toString(csr)+" == 4) || ("+toString(csr)+" == 260)) || ("+toString(csr)+" == 772))\n" "{\n" "uAddr = 4;\n" "sAddr = 260;\n" "mAddr = 772;\n" "writeMaskM = 3003;\n" "writeMaskS = 819;\n" "writeMaskU = 273;\n" "}\n" "if(uAddr != sAddr)\n" "{\n" "if(((RISCV64*)cpu)->CSR[3088] == 3)\n" "{\n" "writeMask = writeMaskM;\n" "}\n" "if(((RISCV64*)cpu)->CSR[3088] == 1)\n" "{\n" "writeMask = writeMaskS;\n" "}\n" "if(((RISCV64*)cpu)->CSR[3088] == 0)\n" "{\n" "writeMask = writeMaskU;\n" "}\n" "((RISCV64*)cpu)->CSR[uAddr] = ((((RISCV64*)cpu)->CSR[uAddr] & ~writeMask) | ((res | (etiss_uint64)"+toString(zimm)+") & writeMask))&0xffffffffffffffff;\n" "((RISCV64*)cpu)->CSR[sAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n" "((RISCV64*)cpu)->CSR[mAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n" "}\n" "else\n" "{\n" "((RISCV64*)cpu)->CSR["+toString(csr)+"] = (res | (etiss_uint64)"+toString(zimm)+");\n" "}\n" "}\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = res;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition c_jalr_rs1(ISA16_RISCV64, "c.jalr",(uint16_t) 0x9002,(uint16_t) 0xf07f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(11, 7);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[1], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.jalr\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "*((RISCV64*)cpu)->X[1] = "+toString((uint64_t) ic.current_address_)+"ULL + 2;\n" "cpu->instructionPointer = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n" "return 0;\n" ;return true;}, 0, nullptr)
static InstructionDefinition addiw_rd_rs1_imm(ISA32_RISCV64, "addiw",(uint32_t) 0x1b,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_int64 imm=0;static BitArrayRange R_imm_0(31, 20);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//addiw\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "etiss_int32 res = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_int64 cast_0 = (*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff); \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "res = (etiss_int32)cast_0 + imm_extended;\n" "etiss_int32 cast_1 = res; \n" "if((etiss_int32)((etiss_uint32)cast_1 - 0x80000000) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint32)cast_1 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_1;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition sll_rd_rs1_rs2(ISA32_RISCV64, "sll",(uint32_t) 0x1033,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//sll\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (*((RISCV64*)cpu)->X["+toString(rs1)+"] << (*((RISCV64*)cpu)->X["+toString(rs2)+"] & 64 - 1));\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition amoor_w_rd_rs1_rs2_aqu_aq_rel_rl_(ISA32_RISCV64, "amoor.w",(uint32_t) 0x4000202f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 aq=0;static BitArrayRange R_aq_0(26, 26);etiss_uint64 aq_0=R_aq_0.read(ba);aq+=aq_0;etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rl=0;static BitArrayRange R_rl_0(25, 25);etiss_uint64 rl_0=R_rl_0.read(ba);rl+=rl_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//amoor.w\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "etiss_int64 res1 = 0;\n" "etiss_uint64 res2 = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "etiss_uint32 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n" "etiss_int32 cast_0 = MEM_offs; \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "res1 = (etiss_int64)cast_0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = res1;\n" "}\n" "res2 = (res1 | *((RISCV64*)cpu)->X["+toString(rs2)+"]);\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = res2;\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n" "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition sltiu_rd_rs1_imm(ISA32_RISCV64, "sltiu",(uint32_t) 0x3013,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_int64 imm=0;static BitArrayRange R_imm_0(31, 20);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//sltiu\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "etiss_int64 full_imm = 0;\n" "etiss_int8 choose1 = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "etiss_int64 cast_0 = imm_extended; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "full_imm = (etiss_int64)cast_0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "if((etiss_uint64)*((RISCV64*)cpu)->X["+toString(rs1)+"] < (etiss_uint64)full_imm)\n" "{\n" "choose1 = 1;\n" "}\n" "else\n" "{\n" "choose1 = 0;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = choose1;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition c_sub_8_rd_8_rs2(ISA16_RISCV64, "c.sub",(uint16_t) 0x8c01,(uint16_t) 0xfc63, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(4, 2);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(9, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rd+8], 64);partInit.getRegisterDependencies().add(reg_name[rs2+8], 64);partInit.getAffectedRegisters().add(reg_name[rd+8], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.sub\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int8 rd_idx = 0;\n" "rd_idx = "+toString(rd)+" + 8;\n" "*((RISCV64*)cpu)->X[rd_idx] = *((RISCV64*)cpu)->X[rd_idx] - *((RISCV64*)cpu)->X["+toString(rs2)+" + 8];\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fmv_w_x_rd_rs1(ISA32_RISCV64, "fmv.w.x",(uint32_t) 0xf0000053,(uint32_t) 0xfff0707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fmv.w.x\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 upper = 0;\n" "if(64 == 32)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = (*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff);\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 32) | (etiss_uint64)(*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff));\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition amominu_d_rd_rs1_rs2_aqu_aq_rel_rl_(ISA32_RISCV64, "amominu.d",(uint32_t) 0xc000302f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 aq=0;static BitArrayRange R_aq_0(26, 26);etiss_uint64 aq_0=R_aq_0.read(ba);aq+=aq_0;etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rl=0;static BitArrayRange R_rl_0(25, 25);etiss_uint64 rl_0=R_rl_0.read(ba);rl+=rl_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//amominu.d\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "etiss_int64 res = 0;\n" "etiss_uint64 res2 = 0;\n" "etiss_uint64 choose1 = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n" "etiss_int64 cast_0 = MEM_offs; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "res = (etiss_int64)cast_0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = res;\n" "}\n" "if(res > *((RISCV64*)cpu)->X["+toString(rs2)+"])\n" "{\n" "choose1 = *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "}\n" "else\n" "{\n" "choose1 = res;\n" "}\n" "res2 = choose1;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = res2;\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n" "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
#define RISCV64_Pipeline1
virtual unsigned getInstructionSizeInBytes()
virtual const std::set< std::string > & getListenerSupportedRegisters()
static InstructionDefinition fadd_s_rd_frs1_frs2(ISA32_RISCV64, "fadd.s",(uint32_t) 0x53,(uint32_t) 0xfe00007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fadd.s\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 frs1 = 0;\n" "etiss_uint32 choose1 = 0;\n" "etiss_uint32 frs2 = 0;\n" "if(64 == 32)\n" "{\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = fadd_s(((RISCV64*)cpu)->F["+toString(rs1)+"], ((RISCV64*)cpu)->F["+toString(rs2)+"], choose1);\n" "}\n" "else\n" "{\n" "frs1 = unbox_s(((RISCV64*)cpu)->F["+toString(rs1)+"]);\n" "frs2 = unbox_s(((RISCV64*)cpu)->F["+toString(rs2)+"]);\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "res = fadd_s(frs1, frs2, choose1);\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 32) | (etiss_uint64)res);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition feq_d_rd_frs1_frs2(ISA32_RISCV64, "feq.d",(uint32_t) 0xa2002053,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//feq.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 flags = 0;\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_uint64)fcmp_d((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F["+toString(rs2)+"] & 0xffffffffffffffff), (etiss_uint32)0);\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fmin_s_rd_frs1_frs2(ISA32_RISCV64, "fmin.s",(uint32_t) 0x28000053,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fmin.s\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 frs1 = 0;\n" "etiss_uint32 frs2 = 0;\n" "if(64 == 32)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = fsel_s(((RISCV64*)cpu)->F["+toString(rs1)+"], ((RISCV64*)cpu)->F["+toString(rs2)+"], (etiss_uint32)0);\n" "}\n" "else\n" "{\n" "frs1 = unbox_s(((RISCV64*)cpu)->F["+toString(rs1)+"]);\n" "frs2 = unbox_s(((RISCV64*)cpu)->F["+toString(rs2)+"]);\n" "res = fsel_s(frs1, frs2, (etiss_uint32)0);\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 32) | (etiss_uint64)res);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fdiv_s_rd_frs1_frs2(ISA32_RISCV64, "fdiv.s",(uint32_t) 0x18000053,(uint32_t) 0xfe00007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fdiv.s\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 frs1 = 0;\n" "etiss_uint32 choose1 = 0;\n" "etiss_uint32 frs2 = 0;\n" "if(64 == 32)\n" "{\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = fdiv_s(((RISCV64*)cpu)->F["+toString(rs1)+"], ((RISCV64*)cpu)->F["+toString(rs2)+"], choose1);\n" "}\n" "else\n" "{\n" "frs1 = unbox_s(((RISCV64*)cpu)->F["+toString(rs1)+"]);\n" "frs2 = unbox_s(((RISCV64*)cpu)->F["+toString(rs2)+"]);\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "res = fdiv_s(frs1, frs2, choose1);\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 32) | (etiss_uint64)res);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition slli_rd_rs1_shamt(ISA32_RISCV64, "slli",(uint32_t) 0x1013,(uint32_t) 0xfc00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 shamt=0;static BitArrayRange R_shamt_0(25, 20);etiss_uint64 shamt_0=R_shamt_0.read(ba);shamt+=shamt_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//slli\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (*((RISCV64*)cpu)->X["+toString(rs1)+"] << "+toString(shamt)+");\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fcvt_d_w_rd_rs1(ISA32_RISCV64, "fcvt.d.w",(uint32_t) 0xd2000053,(uint32_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fcvt.d.w\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_int64 cast_0 = (*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff); \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "res = fcvt_32_64((etiss_int64)cast_0, (etiss_uint32)2, ("+toString(rm)+" & 0xff));\n" "if(64 == 64)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 64) | res);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fcvt_d_wu_rd_rs1(ISA32_RISCV64, "fcvt.d.wu",(uint32_t) 0xd2100053,(uint32_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fcvt.d.wu\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "etiss_int64 upper = 0;\n" "res = fcvt_32_64((etiss_uint64)(*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff), (etiss_uint32)3, ("+toString(rm)+" & 0xff));\n" "if(64 == 64)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 64) | res);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fmadd_s_rd_frs1_frs2_frs3(ISA32_RISCV64, "fmadd.s",(uint32_t) 0x43,(uint32_t) 0x600007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rs3=0;static BitArrayRange R_rs3_0(31, 27);etiss_uint64 rs3_0=R_rs3_0.read(ba);rs3+=rs3_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fmadd.s\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 frs1 = 0;\n" "etiss_uint32 choose1 = 0;\n" "etiss_uint32 frs2 = 0;\n" "etiss_uint32 frs3 = 0;\n" "if(64 == 32)\n" "{\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = fmadd_s(((RISCV64*)cpu)->F["+toString(rs1)+"], ((RISCV64*)cpu)->F["+toString(rs2)+"], ((RISCV64*)cpu)->F["+toString(rs3)+"], (etiss_uint32)0, choose1);\n" "}\n" "else\n" "{\n" "frs1 = unbox_s(((RISCV64*)cpu)->F["+toString(rs1)+"]);\n" "frs2 = unbox_s(((RISCV64*)cpu)->F["+toString(rs2)+"]);\n" "frs3 = unbox_s(((RISCV64*)cpu)->F["+toString(rs3)+"]);\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "res = fmadd_s(frs1, frs2, frs3, (etiss_uint32)0, choose1);\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 32) | (etiss_uint64)res);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
Configuration & cfg(const std::string &cfgName)
Get reference of the global ETISS configuration object.
static InstructionDefinition amoor_d_rd_rs1_rs2_aqu_aq_rel_rl_(ISA32_RISCV64, "amoor.d",(uint32_t) 0x4000302f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 aq=0;static BitArrayRange R_aq_0(26, 26);etiss_uint64 aq_0=R_aq_0.read(ba);aq+=aq_0;etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rl=0;static BitArrayRange R_rl_0(25, 25);etiss_uint64 rl_0=R_rl_0.read(ba);rl+=rl_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//amoor.d\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "etiss_int64 res = 0;\n" "etiss_uint64 res2 = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n" "etiss_int64 cast_0 = MEM_offs; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "res = (etiss_int64)cast_0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = res;\n" "}\n" "res2 = (res | *((RISCV64*)cpu)->X["+toString(rs2)+"]);\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = res2;\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n" "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition mul_rd_rs1_rs2(ISA32_RISCV64, "mul",(uint32_t) 0x2000033,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//mul\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "res = ((etiss_uint64)*((RISCV64*)cpu)->X["+toString(rs1)+"] * (etiss_uint64)*((RISCV64*)cpu)->X["+toString(rs2)+"]);\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_uint64)res;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition uret_(ISA32_RISCV64, "uret",(uint32_t) 0x200073,(uint32_t) 0xffffffff, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//uret\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "((RISCV64*)cpu)->CSR[3088] = 0;\n" "((RISCV64*)cpu)->CSR[0] ^= ((etiss_uint32)((((RISCV64*)cpu)->CSR[0] & 0x10)>>4)) ^ (((RISCV64*)cpu)->CSR[0] & 0x1);\n" "cpu->instructionPointer = ((RISCV64*)cpu)->CSR[65];\n" "((RISCV64*)cpu)->CSR[768]= ((RISCV64*)cpu)->CSR[0];\n" "((RISCV64*)cpu)->CSR[256]=((RISCV64*)cpu)->CSR[0];\n" "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n" "return 0;\n" ;return true;}, 0, nullptr)
static InstructionDefinition fence_(ISA32_RISCV64, "fence",(uint32_t) 0xf,(uint32_t) 0xf000707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 succ=0;static BitArrayRange R_succ_0(23, 20);etiss_uint64 succ_0=R_succ_0.read(ba);succ+=succ_0;etiss_uint64 pred=0;static BitArrayRange R_pred_0(27, 24);etiss_uint64 pred_0=R_pred_0.read(ba);pred+=pred_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[0], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fence\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "((RISCV64*)cpu)->FENCE[0] = (("+toString(pred)+" << 4) | "+toString(succ)+");\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition c_add_rd_rs2(ISA16_RISCV64, "c.add",(uint16_t) 0x9002,(uint16_t) 0xf003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(6, 2);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rd], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.add\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = *((RISCV64*)cpu)->X["+toString(rd)+"] + *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fsgnjn_d_rd_frs1_frs2(ISA32_RISCV64, "fsgnjn.d",(uint32_t) 0x22001053,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fsgnjn.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "etiss_int64 ONE = 0;\n" "etiss_int64 upper = 0;\n" "etiss_int64 MSK1 = 0;\n" "etiss_int64 MSK2 = 0;\n" "ONE = 1;\n" "MSK1 = (ONE << 63);\n" "MSK2 = MSK1 - 1;\n" "res = (((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffffffffffff) & MSK2) | (~(((RISCV64*)cpu)->F["+toString(rs2)+"] & 0xffffffffffffffff) & MSK1))&0xffffffffffffffff;\n" "if(64 == 64)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 64) | res);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fnmsub_d_rd_frs1_frs2_frs3(ISA32_RISCV64, "fnmsub.d",(uint32_t) 0x200004b,(uint32_t) 0x600007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rs3=0;static BitArrayRange R_rs3_0(31, 27);etiss_uint64 rs3_0=R_rs3_0.read(ba);rs3+=rs3_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fnmsub.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 choose1 = 0;\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "res = fmadd_d((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F["+toString(rs2)+"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F["+toString(rs3)+"] & 0xffffffffffffffff), (etiss_uint32)3, choose1);\n" "if(64 == 64)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 64) | res);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition rem_rd_rs1_rs2(ISA32_RISCV64, "rem",(uint32_t) 0x2006033,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//rem\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int32 XLM1 = 0;\n" "etiss_int64 MMIN = 0;\n" "etiss_int64 M1 = 0;\n" "etiss_int64 ONE = 0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "if(*((RISCV64*)cpu)->X["+toString(rs2)+"] != 0)\n" "{\n" "M1 = - 1;\n" "XLM1 = 64 - 1;\n" "ONE = 1;\n" "MMIN = (ONE << XLM1);\n" "if((*((RISCV64*)cpu)->X["+toString(rs1)+"] == MMIN) && (*((RISCV64*)cpu)->X["+toString(rs2)+"] == M1))\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = 0;\n" "}\n" "else\n" "{\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs2)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "etiss_int64 cast_1 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = ((etiss_int64)cast_1 % (etiss_int64)cast_0);\n" "}\n" "}\n" "else\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "}\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition c_xor_8_rd_8_rs2(ISA16_RISCV64, "c.xor",(uint16_t) 0x8c21,(uint16_t) 0xfc63, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(4, 2);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(9, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rd+8], 64);partInit.getRegisterDependencies().add(reg_name[rs2+8], 64);partInit.getAffectedRegisters().add(reg_name[rd+8], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.xor\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int8 rd_idx = 0;\n" "rd_idx = "+toString(rd)+" + 8;\n" "*((RISCV64*)cpu)->X[rd_idx] = (*((RISCV64*)cpu)->X[rd_idx] ^ *((RISCV64*)cpu)->X["+toString(rs2)+" + 8]);\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" ;return true;}, 0, nullptr)
RegisterSet & getRegisterDependencies()
static InstructionDefinition addw_(ISA32_RISCV64, "addw",(uint32_t) 0x3b,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//addw\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 res = 0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "res = (*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff) + (*((RISCV64*)cpu)->X["+toString(rs2)+"] & 0xffffffff);\n" "etiss_int32 cast_0 = res; \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fmv_x_w_rd_frs1(ISA32_RISCV64, "fmv.x.w",(uint32_t) 0xe0000053,(uint32_t) 0xfff0707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fmv.x.w\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 cast_0 = (((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffff); \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition c_sdsp_rs2_uimm_sp_(ISA16_RISCV64, "c.sdsp",(uint16_t) 0xe002,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(6, 2);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 uimm=0;static BitArrayRange R_uimm_3(12, 10);etiss_uint64 uimm_3=R_uimm_3.read(ba);uimm+=uimm_3<< 3;static BitArrayRange R_uimm_6(9, 7);etiss_uint64 uimm_6=R_uimm_6.read(ba);uimm+=uimm_6<< 6;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[2], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.sdsp\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "offs = *((RISCV64*)cpu)->X[2] + "+toString(uimm)+";\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n" "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition ori_rd_rs1_imm(ISA32_RISCV64, "ori",(uint32_t) 0x6013,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_int64 imm=0;static BitArrayRange R_imm_0(31, 20);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//ori\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = ((etiss_int64)cast_0 | imm_extended);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fle_s_rd_frs1_frs2(ISA32_RISCV64, "fle.s",(uint32_t) 0xa0000053,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fle.s\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 frs1 = 0;\n" "etiss_uint32 frs2 = 0;\n" "if(64 == 32)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_uint64)fcmp_s(((RISCV64*)cpu)->F["+toString(rs1)+"], ((RISCV64*)cpu)->F["+toString(rs2)+"], (etiss_uint32)1);\n" "}\n" "else\n" "{\n" "frs1 = unbox_s(((RISCV64*)cpu)->F["+toString(rs1)+"]);\n" "frs2 = unbox_s(((RISCV64*)cpu)->F["+toString(rs2)+"]);\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_uint64)fcmp_s(frs1, frs2, (etiss_uint32)1);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition flw_rd_imm_xrs1_(ISA32_RISCV64, "flw",(uint32_t) 0x2007,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_int64 imm=0;static BitArrayRange R_imm_0(31, 20);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//flw\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 offs = 0;\n" "etiss_int64 imm_extended = 0;\n" "etiss_uint32 res = 0;\n" "etiss_int64 upper = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "offs = (etiss_int64)cast_0 + imm_extended;\n" "etiss_uint32 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n" "res = MEM_offs;\n" "if(64 == 32)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 32) | (etiss_uint64)res);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition amoand_w_rd_rs1_rs2_aqu_aq_rel_rl_(ISA32_RISCV64, "amoand.w",(uint32_t) 0x6000202f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 aq=0;static BitArrayRange R_aq_0(26, 26);etiss_uint64 aq_0=R_aq_0.read(ba);aq+=aq_0;etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rl=0;static BitArrayRange R_rl_0(25, 25);etiss_uint64 rl_0=R_rl_0.read(ba);rl+=rl_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//amoand.w\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "etiss_int64 res1 = 0;\n" "etiss_uint64 res2 = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "etiss_uint32 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n" "etiss_int32 cast_0 = MEM_offs; \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "res1 = (etiss_int64)cast_0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = res1;\n" "}\n" "res2 = (res1 & *((RISCV64*)cpu)->X["+toString(rs2)+"]);\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = res2;\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n" "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition remw_rd_rs1_rs2(ISA32_RISCV64, "remw",(uint32_t) 0x200603b,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//remw\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int32 MMIN = 0;\n" "etiss_int32 M1 = 0;\n" "etiss_int32 ONE = 0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "if(*((RISCV64*)cpu)->X["+toString(rs2)+"] != 0)\n" "{\n" "M1 = - 1;\n" "ONE = 1;\n" "MMIN = (ONE << 31);\n" "if(((*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff) == MMIN) && (*((RISCV64*)cpu)->X["+toString(rs2)+"] == M1))\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = 0;\n" "}\n" "else\n" "{\n" "etiss_int64 cast_0 = (*((RISCV64*)cpu)->X["+toString(rs2)+"] & 0xffffffff); \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "etiss_int64 cast_1 = (*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff); \n" "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n" "}\n" "etiss_int64 cast_2 = ((etiss_int64)cast_1 % (etiss_int64)cast_0); \n" "if((etiss_int64)((etiss_uint64)cast_2 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_2 =0x0 + (etiss_uint64)cast_2 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_2;\n" "}\n" "}\n" "else\n" "{\n" "etiss_int64 cast_3 = (*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff); \n" "if((etiss_int64)((etiss_uint64)cast_3 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_3 =0x0 + (etiss_uint64)cast_3 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_3;\n" "}\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
std::string toString(const T &val)
conversion of type T to std::string.
static InstructionDefinition c_j_imm(ISA16_RISCV64, "c.j",(uint16_t) 0xa001,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_int64 imm=0;static BitArrayRange R_imm_11(12, 12);etiss_int64 imm_11=R_imm_11.read(ba);imm+=imm_11<< 11;static BitArrayRange R_imm_4(11, 11);etiss_int64 imm_4=R_imm_4.read(ba);imm+=imm_4<< 4;static BitArrayRange R_imm_8(10, 9);etiss_int64 imm_8=R_imm_8.read(ba);imm+=imm_8<< 8;static BitArrayRange R_imm_10(8, 8);etiss_int64 imm_10=R_imm_10.read(ba);imm+=imm_10<< 10;static BitArrayRange R_imm_6(7, 7);etiss_int64 imm_6=R_imm_6.read(ba);imm+=imm_6<< 6;static BitArrayRange R_imm_7(6, 6);etiss_int64 imm_7=R_imm_7.read(ba);imm+=imm_7<< 7;static BitArrayRange R_imm_1(5, 3);etiss_int64 imm_1=R_imm_1.read(ba);imm+=imm_1<< 1;static BitArrayRange R_imm_5(2, 2);etiss_int64 imm_5=R_imm_5.read(ba);imm+=imm_5<< 5;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.j\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "etiss_int64 cast_0 = "+toString((uint64_t) ic.current_address_)+"ULL ; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "cpu->instructionPointer = (etiss_int64)cast_0 + imm_extended;\n" "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n" "return 0;\n" ;return true;}, 0, nullptr)
std::set< std::string > & fileglobalCode()
static InstructionDefinition amomax_d_rd_rs1_rs2_aqu_aq_rel_rl_(ISA32_RISCV64, "amomax.d",(uint32_t) 0xa000302f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 aq=0;static BitArrayRange R_aq_0(26, 26);etiss_uint64 aq_0=R_aq_0.read(ba);aq+=aq_0;etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rl=0;static BitArrayRange R_rl_0(25, 25);etiss_uint64 rl_0=R_rl_0.read(ba);rl+=rl_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//amomax.d\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "etiss_int64 res = 0;\n" "etiss_uint64 res2 = 0;\n" "etiss_uint64 choose1 = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n" "etiss_int64 cast_0 = MEM_offs; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "res = (etiss_int64)cast_0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = res;\n" "}\n" "etiss_int64 cast_1 = *((RISCV64*)cpu)->X["+toString(rs2)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n" "}\n" "etiss_int64 cast_2 = res; \n" "if((etiss_int64)((etiss_uint64)cast_2 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_2 =0x0 + (etiss_uint64)cast_2 ;\n" "}\n" "if((etiss_int64)cast_2 < (etiss_int64)cast_1)\n" "{\n" "choose1 = *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "}\n" "else\n" "{\n" "choose1 = res;\n" "}\n" "res2 = choose1;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = res2;\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n" "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition amoadd_w_rd_rs1_rs2_aqu_aq_rel_rl_(ISA32_RISCV64, "amoadd.w",(uint32_t) 0x202f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 aq=0;static BitArrayRange R_aq_0(26, 26);etiss_uint64 aq_0=R_aq_0.read(ba);aq+=aq_0;etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rl=0;static BitArrayRange R_rl_0(25, 25);etiss_uint64 rl_0=R_rl_0.read(ba);rl+=rl_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//amoadd.w\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "etiss_int64 res1 = 0;\n" "etiss_uint64 res2 = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "etiss_uint32 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n" "etiss_int32 cast_0 = MEM_offs; \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "res1 = (etiss_int64)cast_0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = res1;\n" "}\n" "res2 = res1 + *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = res2;\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n" "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition c_andi_8_rs1_imm(ISA16_RISCV64, "c.andi",(uint16_t) 0x8801,(uint16_t) 0xec03, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(9, 7);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_int64 imm=0;static BitArrayRange R_imm_5(12, 12);etiss_int64 imm_5=R_imm_5.read(ba);imm+=imm_5<< 5;static BitArrayRange R_imm_0(6, 2);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1+8], 64);partInit.getAffectedRegisters().add(reg_name[rs1+8], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.andi\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "etiss_int8 rs1_idx = 0;\n" "if(("+toString(imm)+" & 0x20)>>5 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294967232;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "rs1_idx = "+toString(rs1)+" + 8;\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[rs1_idx]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X[rs1_idx] = ((etiss_int64)cast_0 & imm_extended);\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fsub_s_rd_frs1_frs2(ISA32_RISCV64, "fsub.s",(uint32_t) 0x8000053,(uint32_t) 0xfe00007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fsub.s\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 frs1 = 0;\n" "etiss_uint32 choose1 = 0;\n" "etiss_uint32 frs2 = 0;\n" "if(64 == 32)\n" "{\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = fsub_s(((RISCV64*)cpu)->F["+toString(rs1)+"], ((RISCV64*)cpu)->F["+toString(rs2)+"], choose1);\n" "}\n" "else\n" "{\n" "frs1 = unbox_s(((RISCV64*)cpu)->F["+toString(rs1)+"]);\n" "frs2 = unbox_s(((RISCV64*)cpu)->F["+toString(rs2)+"]);\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "res = fsub_s(frs1, frs2, choose1);\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 32) | (etiss_uint64)res);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fcvt_s_d_rd_frs1(ISA32_RISCV64, "fcvt.s.d",(uint32_t) 0x40100053,(uint32_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fcvt.s.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 res = 0;\n" "etiss_int64 upper = 0;\n" "res = fconv_d2f(((RISCV64*)cpu)->F["+toString(rs1)+"], ("+toString(rm)+" & 0xff));\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 32) | (etiss_uint64)res);\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition bgeu_rs1_rs2_imm(ISA32_RISCV64, "bgeu",(uint32_t) 0x7063,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_int64 imm=0;static BitArrayRange R_imm_12(31, 31);etiss_int64 imm_12=R_imm_12.read(ba);imm+=imm_12<< 12;static BitArrayRange R_imm_5(30, 25);etiss_int64 imm_5=R_imm_5.read(ba);imm+=imm_5<< 5;static BitArrayRange R_imm_1(11, 8);etiss_int64 imm_1=R_imm_1.read(ba);imm+=imm_1<< 1;static BitArrayRange R_imm_11(7, 7);etiss_int64 imm_11=R_imm_11.read(ba);imm+=imm_11<< 11;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//bgeu\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "etiss_int64 choose1 = 0;\n" "if(("+toString(imm)+" & 0x1000)>>12 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294959104;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "if(*((RISCV64*)cpu)->X["+toString(rs1)+"] >= *((RISCV64*)cpu)->X["+toString(rs2)+"])\n" "{\n" "etiss_int64 cast_0 = "+toString((uint64_t) ic.current_address_)+"ULL ; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "choose1 = (etiss_int64)cast_0 + imm_extended;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "}\n" "else\n" "{\n" "choose1 = "+toString((uint64_t) ic.current_address_)+"ULL + 4;\n" "}\n" "cpu->instructionPointer = choose1;\n" "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n" "return 0;\n" ;return true;}, 0, nullptr)
etiss::instr::InstructionGroup ISA16_RISCV64("ISA16_RISCV64", 16)
static InstructionDefinition bge_rs1_rs2_imm(ISA32_RISCV64, "bge",(uint32_t) 0x5063,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_int64 imm=0;static BitArrayRange R_imm_12(31, 31);etiss_int64 imm_12=R_imm_12.read(ba);imm+=imm_12<< 12;static BitArrayRange R_imm_5(30, 25);etiss_int64 imm_5=R_imm_5.read(ba);imm+=imm_5<< 5;static BitArrayRange R_imm_1(11, 8);etiss_int64 imm_1=R_imm_1.read(ba);imm+=imm_1<< 1;static BitArrayRange R_imm_11(7, 7);etiss_int64 imm_11=R_imm_11.read(ba);imm+=imm_11<< 11;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//bge\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "etiss_int64 choose1 = 0;\n" "if(("+toString(imm)+" & 0x1000)>>12 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294959104;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs2)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "etiss_int64 cast_1 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n" "}\n" "if((etiss_int64)cast_1 >= (etiss_int64)cast_0)\n" "{\n" "etiss_int64 cast_2 = "+toString((uint64_t) ic.current_address_)+"ULL ; \n" "if((etiss_int64)((etiss_uint64)cast_2 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_2 =0x0 + (etiss_uint64)cast_2 ;\n" "}\n" "choose1 = (etiss_int64)cast_2 + imm_extended;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "}\n" "else\n" "{\n" "choose1 = "+toString((uint64_t) ic.current_address_)+"ULL + 4;\n" "}\n" "cpu->instructionPointer = choose1;\n" "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n" "return 0;\n" ;return true;}, 0, nullptr)
static InstructionDefinition c_slli_rs1_shamt(ISA16_RISCV64, "c.slli",(uint16_t) 0x2,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(11, 7);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 shamt=0;static BitArrayRange R_shamt_5(12, 12);etiss_uint64 shamt_5=R_shamt_5.read(ba);shamt+=shamt_5<< 5;static BitArrayRange R_shamt_0(6, 2);etiss_uint64 shamt_0=R_shamt_0.read(ba);shamt+=shamt_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.slli\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "if("+toString(rs1)+" == 0)\n" "{\n" "exception = ETISS_RETURNCODE_ILLEGALINSTRUCTION; \n" "}\n" "*((RISCV64*)cpu)->X["+toString(rs1)+"] = (*((RISCV64*)cpu)->X["+toString(rs1)+"] << "+toString(shamt)+");\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
etiss_uint64 cpuTime_ps
simulation time of cpu
etiss::Plugin * newTimer(ETISS_CPU *cpu)
create a simple default timer implementaion instance for this architecture.
virtual unsigned getMaximumInstructionSizeInBytes()
virtual void resetCPU(ETISS_CPU *cpu, etiss::uint64 *startpointer)
reset cpu (structure)
static InstructionDefinition or_rd_rs1_rs2(ISA32_RISCV64, "or",(uint32_t) 0x6033,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//or\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (*((RISCV64*)cpu)->X["+toString(rs1)+"] | *((RISCV64*)cpu)->X["+toString(rs2)+"]);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition lbu_rd_imm_rs1_(ISA32_RISCV64, "lbu",(uint32_t) 0x4003,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_int64 imm=0;static BitArrayRange R_imm_0(31, 20);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//lbu\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 offs = 0;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "offs = (etiss_int64)cast_0 + imm_extended;\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_uint8 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,1);\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_uint64)MEM_offs;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition beq_rs1_rs2_imm(ISA32_RISCV64, "beq",(uint32_t) 0x63,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_int64 imm=0;static BitArrayRange R_imm_12(31, 31);etiss_int64 imm_12=R_imm_12.read(ba);imm+=imm_12<< 12;static BitArrayRange R_imm_5(30, 25);etiss_int64 imm_5=R_imm_5.read(ba);imm+=imm_5<< 5;static BitArrayRange R_imm_1(11, 8);etiss_int64 imm_1=R_imm_1.read(ba);imm+=imm_1<< 1;static BitArrayRange R_imm_11(7, 7);etiss_int64 imm_11=R_imm_11.read(ba);imm+=imm_11<< 11;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//beq\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "etiss_int64 choose1 = 0;\n" "if(("+toString(imm)+" & 0x1000)>>12 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294959104;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "if(*((RISCV64*)cpu)->X["+toString(rs1)+"] == *((RISCV64*)cpu)->X["+toString(rs2)+"])\n" "{\n" "etiss_int64 cast_0 = "+toString((uint64_t) ic.current_address_)+"ULL ; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "choose1 = (etiss_int64)cast_0 + imm_extended;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "}\n" "else\n" "{\n" "choose1 = "+toString((uint64_t) ic.current_address_)+"ULL + 4;\n" "}\n" "cpu->instructionPointer = choose1;\n" "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n" "return 0;\n" ;return true;}, 0, nullptr)
static InstructionDefinition c_nop_(ISA16_RISCV64, "c.nop",(uint16_t) 0x1,(uint16_t) 0xffff, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.nop\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition c_lui_rd_imm(ISA16_RISCV64, "c.lui",(uint16_t) 0x6001,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 imm=0;static BitArrayRange R_imm_17(12, 12);etiss_uint64 imm_17=R_imm_17.read(ba);imm+=imm_17<< 17;static BitArrayRange R_imm_12(6, 2);etiss_int64 imm_12=R_imm_12.read(ba);imm+=imm_12<< 12;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.lui\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x20000)>>17 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294705152;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "if("+toString(rd)+" == 0)\n" "{\n" "exception = ETISS_RETURNCODE_ILLEGALINSTRUCTION; \n" "}\n" "if(imm_extended == 0)\n" "{\n" "exception = ETISS_RETURNCODE_ILLEGALINSTRUCTION; \n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = imm_extended;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition lb_rd_imm_rs1_(ISA32_RISCV64, "lb",(uint32_t) 0x3,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_int64 imm=0;static BitArrayRange R_imm_0(31, 20);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//lb\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 offs = 0;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "offs = (etiss_int64)cast_0 + imm_extended;\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_uint8 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,1);\n" "etiss_int8 cast_1 = MEM_offs; \n" "if((etiss_int8)((etiss_uint8)cast_1 - 0x80) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint8)cast_1 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_1;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition sh_rs2_imm_rs1_(ISA32_RISCV64, "sh",(uint32_t) 0x1023,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_int64 imm=0;static BitArrayRange R_imm_5(31, 25);etiss_int64 imm_5=R_imm_5.read(ba);imm+=imm_5<< 5;static BitArrayRange R_imm_0(11, 7);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//sh\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 offs = 0;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "offs = (etiss_int64)cast_0 + imm_extended;\n" "etiss_uint16 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,2);\n" "if((offs + 2 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition fmadd_d_rd_frs1_frs2_frs3(ISA32_RISCV64, "fmadd.d",(uint32_t) 0x2000043,(uint32_t) 0x600007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rs3=0;static BitArrayRange R_rs3_0(31, 27);etiss_uint64 rs3_0=R_rs3_0.read(ba);rs3+=rs3_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fmadd.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 choose1 = 0;\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "res = fmadd_d((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F["+toString(rs2)+"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F["+toString(rs3)+"] & 0xffffffffffffffff), (etiss_uint64)0, choose1);\n" "if(64 == 64)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 64) | res);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fcvt_lu_s_rd_frs1(ISA32_RISCV64, "fcvt.lu.s",(uint32_t) 0xc0300053,(uint32_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fcvt.lu.s\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "etiss_uint32 flags = 0;\n" "res = fcvt_32_64(unbox_s(((RISCV64*)cpu)->F["+toString(rs1)+"]), (etiss_uint32)1, ("+toString(rm)+" & 0xff));\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_uint64)res;\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
std::set< std::string > headers_
static InstructionDefinition bltu_rs1_rs2_imm(ISA32_RISCV64, "bltu",(uint32_t) 0x6063,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_int64 imm=0;static BitArrayRange R_imm_12(31, 31);etiss_int64 imm_12=R_imm_12.read(ba);imm+=imm_12<< 12;static BitArrayRange R_imm_5(30, 25);etiss_int64 imm_5=R_imm_5.read(ba);imm+=imm_5<< 5;static BitArrayRange R_imm_1(11, 8);etiss_int64 imm_1=R_imm_1.read(ba);imm+=imm_1<< 1;static BitArrayRange R_imm_11(7, 7);etiss_int64 imm_11=R_imm_11.read(ba);imm+=imm_11<< 11;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//bltu\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "etiss_int64 choose1 = 0;\n" "if(("+toString(imm)+" & 0x1000)>>12 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294959104;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "if(*((RISCV64*)cpu)->X["+toString(rs1)+"] < *((RISCV64*)cpu)->X["+toString(rs2)+"])\n" "{\n" "etiss_int64 cast_0 = "+toString((uint64_t) ic.current_address_)+"ULL ; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "choose1 = (etiss_int64)cast_0 + imm_extended;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "}\n" "else\n" "{\n" "choose1 = "+toString((uint64_t) ic.current_address_)+"ULL + 4;\n" "}\n" "cpu->instructionPointer = choose1;\n" "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n" "return 0;\n" ;return true;}, 0, nullptr)
static InstructionDefinition fcvt_lu_d_rd_frs1(ISA32_RISCV64, "fcvt.lu.d",(uint32_t) 0xc2300053,(uint32_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fcvt.lu.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 flags = 0;\n" "etiss_int64 cast_0 = fcvt_d((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffffffffffff), (etiss_uint32)1, ("+toString(rm)+" & 0xff)); \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition c_srli_8_rs1_shamt(ISA16_RISCV64, "c.srli",(uint16_t) 0x8001,(uint16_t) 0xec03, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(9, 7);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 shamt=0;static BitArrayRange R_shamt_5(12, 12);etiss_uint64 shamt_5=R_shamt_5.read(ba);shamt+=shamt_5<< 5;static BitArrayRange R_shamt_0(6, 2);etiss_uint64 shamt_0=R_shamt_0.read(ba);shamt+=shamt_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1+8], 64);partInit.getAffectedRegisters().add(reg_name[rs1+8], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.srli\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int8 rs1_idx = 0;\n" "rs1_idx = "+toString(rs1)+" + 8;\n" "*((RISCV64*)cpu)->X[rs1_idx] = (*((RISCV64*)cpu)->X[rs1_idx] >> "+toString(shamt)+");\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition c_jr_rs1(ISA16_RISCV64, "c.jr",(uint16_t) 0x8002,(uint16_t) 0xf07f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(11, 7);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.jr\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "cpu->instructionPointer = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n" "return 0;\n" ;return true;}, 0, nullptr)
static InstructionDefinition c_sd_8_rs2_uimm_8_rs1_(ISA16_RISCV64, "c.sd",(uint16_t) 0xe000,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(4, 2);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(9, 7);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 uimm=0;static BitArrayRange R_uimm_3(12, 10);etiss_uint64 uimm_3=R_uimm_3.read(ba);uimm+=uimm_3<< 3;static BitArrayRange R_uimm_6(6, 5);etiss_uint64 uimm_6=R_uimm_6.read(ba);uimm+=uimm_6<< 6;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1+8], 64);partInit.getRegisterDependencies().add(reg_name[rs2+8], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.sd\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+" + 8] + "+toString(uimm)+";\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = *((RISCV64*)cpu)->X["+toString(rs2)+" + 8];\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n" "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition ld_rd_imm_rs1_(ISA32_RISCV64, "ld",(uint32_t) 0x3003,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_int64 imm=0;static BitArrayRange R_imm_0(31, 20);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//ld\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 offs = 0;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "offs = (etiss_int64)cast_0 + imm_extended;\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n" "etiss_int64 cast_1 = MEM_offs; \n" "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_1;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition fmul_d_rd_frs1_frs2(ISA32_RISCV64, "fmul.d",(uint32_t) 0x12000053,(uint32_t) 0xfe00007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fmul.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 choose1 = 0;\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "res = fmul_d((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F["+toString(rs2)+"] & 0xffffffffffffffff), choose1);\n" "if(64 == 64)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 64) | res);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition sw_rs2_imm_rs1_(ISA32_RISCV64, "sw",(uint32_t) 0x2023,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_int64 imm=0;static BitArrayRange R_imm_5(31, 25);etiss_int64 imm_5=R_imm_5.read(ba);imm+=imm_5<< 5;static BitArrayRange R_imm_0(11, 7);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//sw\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 offs = 0;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "offs = (etiss_int64)cast_0 + imm_extended;\n" "etiss_uint32 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n" "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition c_fsd_rs2_uimm_8_rs1_(ISA16_RISCV64, "c.fsd",(uint16_t) 0xa000,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(4, 2);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(9, 7);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 uimm=0;static BitArrayRange R_uimm_3(12, 10);etiss_uint64 uimm_3=R_uimm_3.read(ba);uimm+=uimm_3<< 3;static BitArrayRange R_uimm_6(6, 5);etiss_uint64 uimm_6=R_uimm_6.read(ba);uimm+=uimm_6<< 6;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2+8], 64);partInit.getRegisterDependencies().add(reg_name[rs1+8], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.fsd\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+" + 8] + "+toString(uimm)+";\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = (((RISCV64*)cpu)->F["+toString(rs2)+" + 8] & 0xffffffffffffffff);\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n" "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition srli_rd_rs1_shamt(ISA32_RISCV64, "srli",(uint32_t) 0x5013,(uint32_t) 0xfc00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 shamt=0;static BitArrayRange R_shamt_0(25, 20);etiss_uint64 shamt_0=R_shamt_0.read(ba);shamt+=shamt_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//srli\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (*((RISCV64*)cpu)->X["+toString(rs1)+"] >> "+toString(shamt)+");\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition mulhsu_rd_rs1_rs2(ISA32_RISCV64, "mulhsu",(uint32_t) 0x2002033,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//mulhsu\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "res = ((etiss_int64)cast_0 * (etiss_uint64)*((RISCV64*)cpu)->X["+toString(rs2)+"]);\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_uint64)(res >> 64);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fmax_d_rd_frs1_frs2(ISA32_RISCV64, "fmax.d",(uint32_t) 0x2a001053,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fmax.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 flags = 0;\n" "res = fsel_d((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F["+toString(rs2)+"] & 0xffffffffffffffff), (etiss_uint32)1);\n" "if(64 == 64)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 64) | res);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fmv_x_d_rd_frs1(ISA32_RISCV64, "fmv.x.d",(uint32_t) 0xe2000053,(uint32_t) 0xfff0707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fmv.x.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 cast_0 = ((RISCV64*)cpu)->F["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition lh_rd_imm_rs1_(ISA32_RISCV64, "lh",(uint32_t) 0x1003,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_int64 imm=0;static BitArrayRange R_imm_0(31, 20);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//lh\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 offs = 0;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "offs = (etiss_int64)cast_0 + imm_extended;\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_uint16 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,2);\n" "etiss_int16 cast_1 = MEM_offs; \n" "if((etiss_int16)((etiss_uint16)cast_1 - 0x8000) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint16)cast_1 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_1;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
void append(const CodePart &part, CodePart::TYPE type)
static InstructionDefinition sra_rd_rs1_rs2(ISA32_RISCV64, "sra",(uint32_t) 0x40005033,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//sra\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = ((etiss_int64)cast_0 >> (*((RISCV64*)cpu)->X["+toString(rs2)+"] & 64 - 1));\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fld_rd_imm_rs1_(ISA32_RISCV64, "fld",(uint32_t) 0x3007,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_int64 imm=0;static BitArrayRange R_imm_0(31, 20);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fld\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 offs = 0;\n" "etiss_int64 imm_extended = 0;\n" "etiss_uint64 res = 0;\n" "etiss_int64 upper = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "offs = (etiss_int64)cast_0 + imm_extended;\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n" "res = MEM_offs;\n" "if(64 == 64)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 64) | res);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition sraw_rd_rs1_rs2(ISA32_RISCV64, "sraw",(uint32_t) 0x4000503b,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//sraw\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 sh_val = 0;\n" "etiss_uint32 count = 0;\n" "etiss_int32 mask = 0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "mask = 31;\n" "count = ((*((RISCV64*)cpu)->X["+toString(rs2)+"] & 0xffffffff) & mask);\n" "etiss_int64 cast_0 = (*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff); \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "sh_val = ((etiss_int32)cast_0 >> count);\n" "etiss_int32 cast_1 = sh_val; \n" "if((etiss_int32)((etiss_uint32)cast_1 - 0x80000000) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint32)cast_1 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_1;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fsw_rs2_imm_xrs1_(ISA32_RISCV64, "fsw",(uint32_t) 0x2027,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_int64 imm=0;static BitArrayRange R_imm_5(31, 25);etiss_int64 imm_5=R_imm_5.read(ba);imm+=imm_5<< 5;static BitArrayRange R_imm_0(11, 7);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fsw\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 offs = 0;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "offs = (etiss_int64)cast_0 + imm_extended;\n" "etiss_uint32 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = (((RISCV64*)cpu)->F["+toString(rs2)+"] & 0xffffffff);\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n" "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition ebreak_(ISA32_RISCV64, "ebreak",(uint32_t) 0x100073,(uint32_t) 0xffffffff, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//ebreak\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "return ETISS_RETURNCODE_CPUFINISHED; \n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition amoswap_w_rd_rs1_rs2_aqu_aq_rel_rl_(ISA32_RISCV64, "amoswap.w",(uint32_t) 0x800202f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 aq=0;static BitArrayRange R_aq_0(26, 26);etiss_uint64 aq_0=R_aq_0.read(ba);aq+=aq_0;etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rl=0;static BitArrayRange R_rl_0(25, 25);etiss_uint64 rl_0=R_rl_0.read(ba);rl+=rl_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//amoswap.w\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_uint32 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n" "etiss_int32 cast_0 = MEM_offs; \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "}\n" "etiss_uint32 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n" "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
unsigned short int uint16_t
static InstructionDefinition mulw_rd_rs1_rs2(ISA32_RISCV64, "mulw",(uint32_t) 0x200003b,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//mulw\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_int64 cast_0 = ((*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff) * (*((RISCV64*)cpu)->X["+toString(rs2)+"] & 0xffffffff)); \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
__DEVICE__ void * memset(void *__a, int __b, size_t __c)
static InstructionDefinition c_and_8_rd_8_rs2(ISA16_RISCV64, "c.and",(uint16_t) 0x8c61,(uint16_t) 0xfc63, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(4, 2);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(9, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rd+8], 64);partInit.getRegisterDependencies().add(reg_name[rs2+8], 64);partInit.getAffectedRegisters().add(reg_name[rd+8], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.and\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int8 rd_idx = 0;\n" "rd_idx = "+toString(rd)+" + 8;\n" "*((RISCV64*)cpu)->X[rd_idx] = (*((RISCV64*)cpu)->X[rd_idx] & *((RISCV64*)cpu)->X["+toString(rs2)+" + 8]);\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" ;return true;}, 0, nullptr)
virtual void initCodeBlock(etiss::CodeBlock &cb) const
called before instructions are translated for the code block
static InstructionDefinition divuw_rd_rs1_rs2(ISA32_RISCV64, "divuw",(uint32_t) 0x200503b,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//divuw\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "if("+toString(rd)+" != 0)\n" "{\n" "if((*((RISCV64*)cpu)->X["+toString(rs2)+"] & 0xffffffff) != 0)\n" "{\n" "etiss_int64 cast_0 = ((*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff) / (*((RISCV64*)cpu)->X["+toString(rs2)+"] & 0xffffffff)); \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "}\n" "else\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = - 1;\n" "}\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
unsigned long long int uint64_t
const char * resources[ETISS_MAX_RESOURCES]
names of resources
static InstructionDefinition flt_s_rd_frs1_frs2(ISA32_RISCV64, "flt.s",(uint32_t) 0xa0001053,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//flt.s\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 frs1 = 0;\n" "etiss_uint32 frs2 = 0;\n" "if(64 == 32)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_uint64)fcmp_s(((RISCV64*)cpu)->F["+toString(rs1)+"], ((RISCV64*)cpu)->F["+toString(rs2)+"], (etiss_uint32)2);\n" "}\n" "else\n" "{\n" "frs1 = unbox_s(((RISCV64*)cpu)->F["+toString(rs1)+"]);\n" "frs2 = unbox_s(((RISCV64*)cpu)->F["+toString(rs2)+"]);\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_uint64)fcmp_s(frs1, frs2, (etiss_uint32)2);\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = fcmp_s((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffff), (((RISCV64*)cpu)->F["+toString(rs2)+"] & 0xffffffff), (etiss_uint32)2);\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition amomax_w_rd_rs1_rs2_aqu_aq_rel_rl_(ISA32_RISCV64, "amomax.w",(uint32_t) 0xa000202f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 aq=0;static BitArrayRange R_aq_0(26, 26);etiss_uint64 aq_0=R_aq_0.read(ba);aq+=aq_0;etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rl=0;static BitArrayRange R_rl_0(25, 25);etiss_uint64 rl_0=R_rl_0.read(ba);rl+=rl_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//amomax.w\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "etiss_int64 res1 = 0;\n" "etiss_uint64 res2 = 0;\n" "etiss_uint64 choose1 = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "etiss_uint32 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n" "etiss_int32 cast_0 = MEM_offs; \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "res1 = (etiss_int64)cast_0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = res1;\n" "}\n" "etiss_int64 cast_1 = *((RISCV64*)cpu)->X["+toString(rs2)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n" "}\n" "etiss_int64 cast_2 = res1; \n" "if((etiss_int64)((etiss_uint64)cast_2 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_2 =0x0 + (etiss_uint64)cast_2 ;\n" "}\n" "if((etiss_int64)cast_2 < (etiss_int64)cast_1)\n" "{\n" "choose1 = *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "}\n" "else\n" "{\n" "choose1 = res1;\n" "}\n" "res2 = choose1;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = res2;\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n" "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition dii_(ISA16_RISCV64, "dii",(uint16_t) 0x0,(uint16_t) 0xffff, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//dii\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "exception = ETISS_RETURNCODE_ILLEGALINSTRUCTION; \n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition mulh_rd_rs1_rs2(ISA32_RISCV64, "mulh",(uint32_t) 0x2001033,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//mulh\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 res = 0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs2)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "etiss_int64 cast_1 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n" "}\n" "res = ((etiss_int64)cast_1 * (etiss_int64)cast_0);\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_uint64)(res >> 64);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fle_d_rd_frs1_frs2(ISA32_RISCV64, "fle.d",(uint32_t) 0xa2000053,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fle.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 flags = 0;\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_uint64)fcmp_d((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F["+toString(rs2)+"] & 0xffffffffffffffff), (etiss_uint32)1);\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fsub_d_rd_frs1_frs2(ISA32_RISCV64, "fsub.d",(uint32_t) 0xa000053,(uint32_t) 0xfe00007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fsub.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 choose1 = 0;\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "res = fsub_d((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F["+toString(rs2)+"] & 0xffffffffffffffff), choose1);\n" "if(64 == 64)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 64) | res);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition c_fld_rd_uimm_8_rs1_(ISA16_RISCV64, "c.fld",(uint16_t) 0x2000,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(9, 7);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 uimm=0;static BitArrayRange R_uimm_3(12, 10);etiss_uint64 uimm_3=R_uimm_3.read(ba);uimm+=uimm_3<< 3;static BitArrayRange R_uimm_6(6, 5);etiss_uint64 uimm_6=R_uimm_6.read(ba);uimm+=uimm_6<< 6;etiss_uint64 rd=0;static BitArrayRange R_rd_0(4, 2);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1+8], 64);partInit.getAffectedRegisters().add(reg_name[rd+8], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.fld\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "etiss_uint64 res = 0;\n" "etiss_int64 upper = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+" + 8] + "+toString(uimm)+";\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n" "res = MEM_offs;\n" "if(64 == 64)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+" + 8] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+" + 8] = ((upper << 64) | res);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
etiss::mm::MMU * newMMU(ETISS_CPU *cpu)
It is an interface to instanciate a Memory Management Unit.
static InstructionDefinition c_fldsp_rd_uimm_x2_(ISA16_RISCV64, "c.fldsp",(uint16_t) 0x2002,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 uimm=0;static BitArrayRange R_uimm_5(12, 12);etiss_uint64 uimm_5=R_uimm_5.read(ba);uimm+=uimm_5<< 5;static BitArrayRange R_uimm_3(6, 5);etiss_uint64 uimm_3=R_uimm_3.read(ba);uimm+=uimm_3<< 3;static BitArrayRange R_uimm_6(4, 2);etiss_uint64 uimm_6=R_uimm_6.read(ba);uimm+=uimm_6<< 6;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[2], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.fldsp\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "etiss_uint64 res = 0;\n" "etiss_int64 upper = 0;\n" "offs = *((RISCV64*)cpu)->X[2] + "+toString(uimm)+";\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n" "res = MEM_offs;\n" "if(64 == 64)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 64) | (etiss_uint64)res);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition sret_(ISA32_RISCV64, "sret",(uint32_t) 0x10200073,(uint32_t) 0xffffffff, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//sret\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "((RISCV64*)cpu)->CSR[3088] = (((RISCV64*)cpu)->CSR[256] & 0x100)>>8;\n" "((RISCV64*)cpu)->CSR[256] ^= (((RISCV64*)cpu)->CSR[256] & 0x100);\n" "((RISCV64*)cpu)->CSR[256] ^= ((etiss_uint32)((((RISCV64*)cpu)->CSR[256] & 0x20)>>4)) ^ (((RISCV64*)cpu)->CSR[256] & 0x2);\n" "cpu->instructionPointer = ((RISCV64*)cpu)->CSR[321];\n" "((RISCV64*)cpu)->CSR[768]= ((RISCV64*)cpu)->CSR[256];\n" "((RISCV64*)cpu)->CSR[0]=((RISCV64*)cpu)->CSR[256];\n" "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n" "return 0;\n" ;return true;}, 0, nullptr)
static InstructionDefinition andi_rd_rs1_imm(ISA32_RISCV64, "andi",(uint32_t) 0x7013,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_int64 imm=0;static BitArrayRange R_imm_0(31, 20);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//andi\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = ((etiss_int64)cast_0 & imm_extended);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition lhu_rd_imm_rs1_(ISA32_RISCV64, "lhu",(uint32_t) 0x5003,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_int64 imm=0;static BitArrayRange R_imm_0(31, 20);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//lhu\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 offs = 0;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "offs = (etiss_int64)cast_0 + imm_extended;\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_uint16 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,2);\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_uint64)MEM_offs;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition amoswap_d_rd_rs1_rs2_aqu_aq_rel_rl_(ISA32_RISCV64, "amoswap.d",(uint32_t) 0x800302f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 aq=0;static BitArrayRange R_aq_0(26, 26);etiss_uint64 aq_0=R_aq_0.read(ba);aq+=aq_0;etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rl=0;static BitArrayRange R_rl_0(25, 25);etiss_uint64 rl_0=R_rl_0.read(ba);rl+=rl_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//amoswap.d\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n" "etiss_int64 cast_0 = MEM_offs; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "}\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n" "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
etiss_uint64 cpuCycleTime_ps
frequency of the cpu. use to allign e.g. memory delays
static InstructionDefinition c_ld_8_rd_uimm_8_rs1_(ISA16_RISCV64, "c.ld",(uint16_t) 0x6000,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(9, 7);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 uimm=0;static BitArrayRange R_uimm_3(12, 10);etiss_uint64 uimm_3=R_uimm_3.read(ba);uimm+=uimm_3<< 3;static BitArrayRange R_uimm_6(6, 5);etiss_uint64 uimm_6=R_uimm_6.read(ba);uimm+=uimm_6<< 6;etiss_uint64 rd=0;static BitArrayRange R_rd_0(4, 2);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1+8], 64);partInit.getAffectedRegisters().add(reg_name[rd+8], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.ld\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+" + 8] + "+toString(uimm)+";\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n" "etiss_int64 cast_0 = MEM_offs; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+" + 8] = (etiss_int64)cast_0;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition csrrc_rd_csr_rs1(ISA32_RISCV64, "csrrc",(uint32_t) 0x3073,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 csr=0;static BitArrayRange R_csr_0(31, 20);etiss_uint64 csr_0=R_csr_0.read(ba);csr+=csr_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//csrrc\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 xrs1 = 0;\n" "etiss_int64 mAddr = 0;\n" "etiss_int64 writeMask = 0;\n" "etiss_int64 writeMaskU = 0;\n" "etiss_int64 sAddr = 0;\n" "etiss_int64 writeMaskS = 0;\n" "etiss_int64 uAddr = 0;\n" "etiss_uint64 xrd = 0;\n" "etiss_int64 writeMaskM = 0;\n" "xrd = ((RISCV64*)cpu)->CSR["+toString(csr)+"];\n" "xrs1 = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = xrd;\n" "}\n" "if("+toString(rs1)+" != 0)\n" "{\n" "if((("+toString(csr)+" == 0) || ("+toString(csr)+" == 256)) || ("+toString(csr)+" == 768))\n" "{\n" "uAddr = 0;\n" "sAddr = 256;\n" "mAddr = 768;\n" "writeMaskM = -9223372036846388805;\n" "writeMaskS = -9223372036853866189;\n" "writeMaskU = -9223372036853866479;\n" "}\n" "if((("+toString(csr)+" == 68) || ("+toString(csr)+" == 324)) || ("+toString(csr)+" == 836))\n" "{\n" "uAddr = 68;\n" "sAddr = 324;\n" "mAddr = 836;\n" "writeMaskM = 3003;\n" "writeMaskS = 819;\n" "writeMaskU = 273;\n" "}\n" "if((("+toString(csr)+" == 4) || ("+toString(csr)+" == 260)) || ("+toString(csr)+" == 772))\n" "{\n" "uAddr = 4;\n" "sAddr = 260;\n" "mAddr = 772;\n" "writeMaskM = 3003;\n" "writeMaskS = 819;\n" "writeMaskU = 273;\n" "}\n" "if(uAddr != sAddr)\n" "{\n" "if(((RISCV64*)cpu)->CSR[3088] == 3)\n" "{\n" "writeMask = writeMaskM;\n" "}\n" "if(((RISCV64*)cpu)->CSR[3088] == 1)\n" "{\n" "writeMask = writeMaskS;\n" "}\n" "if(((RISCV64*)cpu)->CSR[3088] == 0)\n" "{\n" "writeMask = writeMaskU;\n" "}\n" "((RISCV64*)cpu)->CSR[uAddr] = ((((RISCV64*)cpu)->CSR[uAddr] & ~writeMask) | ((xrd & ~xrs1) & writeMask))&0xffffffffffffffff&0xffffffffffffffff;\n" "((RISCV64*)cpu)->CSR[sAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n" "((RISCV64*)cpu)->CSR[mAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n" "}\n" "else\n" "{\n" "((RISCV64*)cpu)->CSR["+toString(csr)+"] = (xrd & ~xrs1)&0xffffffffffffffff;\n" "}\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
base plugin class that provides access to different plugin functions if present
static InstructionDefinition fsgnjx_d_rd_frs1_frs2(ISA32_RISCV64, "fsgnjx.d",(uint32_t) 0x22002053,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fsgnjx.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "etiss_int64 ONE = 0;\n" "etiss_int64 upper = 0;\n" "etiss_int64 MSK1 = 0;\n" "ONE = 1;\n" "MSK1 = (ONE << 63);\n" "res = ((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffffffffffff) ^ ((((RISCV64*)cpu)->F["+toString(rs2)+"] & 0xffffffffffffffff) & MSK1));\n" "if(64 == 64)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 64) | res);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fsgnjn_s_rd_frs1_frs2(ISA32_RISCV64, "fsgnjn.s",(uint32_t) 0x20001053,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fsgnjn.s\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 frs1 = 0;\n" "etiss_uint32 frs2 = 0;\n" "if(64 == 32)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((((RISCV64*)cpu)->F["+toString(rs1)+"] & 2147483647) | (~((RISCV64*)cpu)->F["+toString(rs2)+"] & -2147483648))&0xffffffffffffffff;\n" "}\n" "else\n" "{\n" "frs1 = unbox_s(((RISCV64*)cpu)->F["+toString(rs1)+"]);\n" "frs2 = unbox_s(((RISCV64*)cpu)->F["+toString(rs2)+"]);\n" "res = ((frs1 & 2147483647) | (~frs2 & -2147483648))&0xffffffff;\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 32) | (etiss_uint64)res);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fmin_d_rd_frs1_frs2(ISA32_RISCV64, "fmin.d",(uint32_t) 0x2a000053,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fmin.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 flags = 0;\n" "res = fsel_d((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F["+toString(rs2)+"] & 0xffffffffffffffff), (etiss_uint32)0);\n" "if(64 == 64)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 64) | res);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
T get(const std::string &key, T default_, bool *default_used=0)
template function to read the value of a configuration key.
static InstructionDefinition amomin_w_rd_rs1_rs2_aqu_aq_rel_rl_(ISA32_RISCV64, "amomin.w",(uint32_t) 0x8000202f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 aq=0;static BitArrayRange R_aq_0(26, 26);etiss_uint64 aq_0=R_aq_0.read(ba);aq+=aq_0;etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rl=0;static BitArrayRange R_rl_0(25, 25);etiss_uint64 rl_0=R_rl_0.read(ba);rl+=rl_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//amomin.w\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "etiss_int64 res1 = 0;\n" "etiss_uint64 res2 = 0;\n" "etiss_uint64 choose1 = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "etiss_uint32 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n" "etiss_int32 cast_0 = MEM_offs; \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "res1 = (etiss_int64)cast_0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = res1;\n" "}\n" "etiss_int64 cast_1 = *((RISCV64*)cpu)->X["+toString(rs2)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n" "}\n" "etiss_int64 cast_2 = res1; \n" "if((etiss_int64)((etiss_uint64)cast_2 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_2 =0x0 + (etiss_uint64)cast_2 ;\n" "}\n" "if((etiss_int64)cast_2 > (etiss_int64)cast_1)\n" "{\n" "choose1 = *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "}\n" "else\n" "{\n" "choose1 = res1;\n" "}\n" "res2 = choose1;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = res2;\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n" "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition lr_d_rd_rs1(ISA32_RISCV64, "lr.d",(uint32_t) 0x1000302f,(uint32_t) 0xf9f0707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 aq=0;static BitArrayRange R_aq_0(26, 26);etiss_uint64 aq_0=R_aq_0.read(ba);aq+=aq_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rl=0;static BitArrayRange R_rl_0(25, 25);etiss_uint64 rl_0=R_rl_0.read(ba);rl+=rl_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//lr.d\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n" "etiss_int64 cast_0 = MEM_offs; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "((RISCV64*)cpu)->RES = offs;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition csrrs_rd_csr_rs1(ISA32_RISCV64, "csrrs",(uint32_t) 0x2073,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 csr=0;static BitArrayRange R_csr_0(31, 20);etiss_uint64 csr_0=R_csr_0.read(ba);csr+=csr_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//csrrs\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 xrs1 = 0;\n" "etiss_int64 mAddr = 0;\n" "etiss_int64 writeMask = 0;\n" "etiss_int64 writeMaskU = 0;\n" "etiss_int64 sAddr = 0;\n" "etiss_int64 writeMaskS = 0;\n" "etiss_int64 uAddr = 0;\n" "etiss_uint64 xrd = 0;\n" "etiss_int64 writeMaskM = 0;\n" "xrd = ((RISCV64*)cpu)->CSR["+toString(csr)+"];\n" "xrs1 = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = xrd;\n" "}\n" "if("+toString(rs1)+" != 0)\n" "{\n" "if((("+toString(csr)+" == 0) || ("+toString(csr)+" == 256)) || ("+toString(csr)+" == 768))\n" "{\n" "uAddr = 0;\n" "sAddr = 256;\n" "mAddr = 768;\n" "writeMaskM = -9223372036846388805;\n" "writeMaskS = -9223372036853866189;\n" "writeMaskU = -9223372036853866479;\n" "}\n" "if((("+toString(csr)+" == 68) || ("+toString(csr)+" == 324)) || ("+toString(csr)+" == 836))\n" "{\n" "uAddr = 68;\n" "sAddr = 324;\n" "mAddr = 836;\n" "writeMaskM = 3003;\n" "writeMaskS = 819;\n" "writeMaskU = 273;\n" "}\n" "if((("+toString(csr)+" == 4) || ("+toString(csr)+" == 260)) || ("+toString(csr)+" == 772))\n" "{\n" "uAddr = 4;\n" "sAddr = 260;\n" "mAddr = 772;\n" "writeMaskM = 3003;\n" "writeMaskS = 819;\n" "writeMaskU = 273;\n" "}\n" "if(uAddr != sAddr)\n" "{\n" "if(((RISCV64*)cpu)->CSR[3088] == 3)\n" "{\n" "writeMask = writeMaskM;\n" "}\n" "if(((RISCV64*)cpu)->CSR[3088] == 1)\n" "{\n" "writeMask = writeMaskS;\n" "}\n" "if(((RISCV64*)cpu)->CSR[3088] == 0)\n" "{\n" "writeMask = writeMaskU;\n" "}\n" "((RISCV64*)cpu)->CSR[uAddr] = ((((RISCV64*)cpu)->CSR[uAddr] & ~writeMask) | ((xrd | xrs1) & writeMask))&0xffffffffffffffff;\n" "((RISCV64*)cpu)->CSR[sAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n" "((RISCV64*)cpu)->CSR[mAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n" "}\n" "else\n" "{\n" "((RISCV64*)cpu)->CSR["+toString(csr)+"] = (xrd | xrs1);\n" "}\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fcvt_s_wu_rd_rs1(ISA32_RISCV64, "fcvt.s.wu",(uint32_t) 0xd0100053,(uint32_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fcvt.s.wu\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 res = 0;\n" "etiss_int64 upper = 0;\n" "if(64 == 32)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = fcvt_s((*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff), (etiss_uint32)3, ("+toString(rm)+" & 0xff));\n" "}\n" "else\n" "{\n" "res = fcvt_s((*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff), (etiss_uint32)3, ("+toString(rm)+" & 0xff));\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 32) | (etiss_uint64)res);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fclass_s_rd_frs1(ISA32_RISCV64, "fclass.s",(uint32_t) 0xe0001053,(uint32_t) 0xfff0707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fclass.s\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = fclass_s(unbox_s(((RISCV64*)cpu)->F["+toString(rs1)+"]));\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fsgnj_d_rd_frs1_frs2(ISA32_RISCV64, "fsgnj.d",(uint32_t) 0x22000053,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fsgnj.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "etiss_int64 ONE = 0;\n" "etiss_int64 upper = 0;\n" "etiss_int64 MSK1 = 0;\n" "etiss_int64 MSK2 = 0;\n" "ONE = 1;\n" "MSK1 = (ONE << 63);\n" "MSK2 = MSK1 - 1;\n" "res = (((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffffffffffff) & MSK2) | ((((RISCV64*)cpu)->F["+toString(rs2)+"] & 0xffffffffffffffff) & MSK1));\n" "if(64 == 64)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 64) | res);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition c_addi4spn_rd_imm(ISA16_RISCV64, "c.addi4spn",(uint16_t) 0x0,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rd=0;static BitArrayRange R_rd_0(4, 2);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 imm=0;static BitArrayRange R_imm_4(12, 11);etiss_uint64 imm_4=R_imm_4.read(ba);imm+=imm_4<< 4;static BitArrayRange R_imm_6(10, 7);etiss_uint64 imm_6=R_imm_6.read(ba);imm+=imm_6<< 6;static BitArrayRange R_imm_2(6, 6);etiss_uint64 imm_2=R_imm_2.read(ba);imm+=imm_2<< 2;static BitArrayRange R_imm_3(5, 5);etiss_uint64 imm_3=R_imm_3.read(ba);imm+=imm_3<< 3;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[2], 64);partInit.getAffectedRegisters().add(reg_name[rd+8], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.addi4spn\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "if("+toString(imm)+" == 0)\n" "{\n" "exception = ETISS_RETURNCODE_ILLEGALINSTRUCTION; \n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+" + 8] = *((RISCV64*)cpu)->X[2] + "+toString(imm)+";\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition amoxor_w_rd_rs1_rs2_aqu_aq_rel_rl_(ISA32_RISCV64, "amoxor.w",(uint32_t) 0x2000202f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 aq=0;static BitArrayRange R_aq_0(26, 26);etiss_uint64 aq_0=R_aq_0.read(ba);aq+=aq_0;etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rl=0;static BitArrayRange R_rl_0(25, 25);etiss_uint64 rl_0=R_rl_0.read(ba);rl+=rl_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//amoxor.w\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "etiss_int64 res1 = 0;\n" "etiss_uint64 res2 = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "etiss_uint32 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n" "etiss_int32 cast_0 = MEM_offs; \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "res1 = (etiss_int64)cast_0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = res1;\n" "}\n" "res2 = (res1 ^ *((RISCV64*)cpu)->X["+toString(rs2)+"]);\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = res2;\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n" "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition fcvt_w_d_rd_frs1(ISA32_RISCV64, "fcvt.w.d",(uint32_t) 0xc2000053,(uint32_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fcvt.w.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 flags = 0;\n" "etiss_int32 cast_0 = fcvt_64_32((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffffffffffff), (etiss_uint32)0, ("+toString(rm)+" & 0xff)); \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition wfi_(ISA32_RISCV64, "wfi",(uint32_t) 0x10500073,(uint32_t) 0xffffffff, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//wfi\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "return ETISS_RETURNCODE_CPUFINISHED; \n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition blt_rs1_rs2_imm(ISA32_RISCV64, "blt",(uint32_t) 0x4063,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_int64 imm=0;static BitArrayRange R_imm_12(31, 31);etiss_int64 imm_12=R_imm_12.read(ba);imm+=imm_12<< 12;static BitArrayRange R_imm_5(30, 25);etiss_int64 imm_5=R_imm_5.read(ba);imm+=imm_5<< 5;static BitArrayRange R_imm_1(11, 8);etiss_int64 imm_1=R_imm_1.read(ba);imm+=imm_1<< 1;static BitArrayRange R_imm_11(7, 7);etiss_int64 imm_11=R_imm_11.read(ba);imm+=imm_11<< 11;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//blt\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "etiss_int64 choose1 = 0;\n" "if(("+toString(imm)+" & 0x1000)>>12 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294959104;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs2)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "etiss_int64 cast_1 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n" "}\n" "if((etiss_int64)cast_1 < (etiss_int64)cast_0)\n" "{\n" "etiss_int64 cast_2 = "+toString((uint64_t) ic.current_address_)+"ULL ; \n" "if((etiss_int64)((etiss_uint64)cast_2 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_2 =0x0 + (etiss_uint64)cast_2 ;\n" "}\n" "choose1 = (etiss_int64)cast_2 + imm_extended;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "}\n" "else\n" "{\n" "choose1 = "+toString((uint64_t) ic.current_address_)+"ULL + 4;\n" "}\n" "cpu->instructionPointer = choose1;\n" "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n" "return 0;\n" ;return true;}, 0, nullptr)
virtual const std::set< std::string > & getHeaders() const
required headers (RISCV64.h)
static InstructionDefinition amoand_d_rd_rs1_rs2_aqu_aq_rel_rl_(ISA32_RISCV64, "amoand.d",(uint32_t) 0x6000302f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 aq=0;static BitArrayRange R_aq_0(26, 26);etiss_uint64 aq_0=R_aq_0.read(ba);aq+=aq_0;etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rl=0;static BitArrayRange R_rl_0(25, 25);etiss_uint64 rl_0=R_rl_0.read(ba);rl+=rl_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//amoand.d\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "etiss_int64 res = 0;\n" "etiss_uint64 res2 = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n" "etiss_int64 cast_0 = MEM_offs; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "res = (etiss_int64)cast_0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = res;\n" "}\n" "res2 = (res & *((RISCV64*)cpu)->X["+toString(rs2)+"]);\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = res2;\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n" "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
etiss_uint64 cycles[ETISS_MAX_RESOURCES]
how many cycles in each resource (including waiting)
static InstructionDefinition fsd_rs2_imm_rs1_(ISA32_RISCV64, "fsd",(uint32_t) 0x3027,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_int64 imm=0;static BitArrayRange R_imm_5(31, 25);etiss_int64 imm_5=R_imm_5.read(ba);imm+=imm_5<< 5;static BitArrayRange R_imm_0(11, 7);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fsd\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 offs = 0;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "offs = (etiss_int64)cast_0 + imm_extended;\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = (((RISCV64*)cpu)->F["+toString(rs2)+"] & 0xffffffffffffffff);\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n" "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition c_subw_8_rd_8_rd_8_rs2(ISA16_RISCV64, "c.subw",(uint16_t) 0x9c01,(uint16_t) 0xfc63, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(4, 2);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(9, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rd+8], 64);partInit.getRegisterDependencies().add(reg_name[rs2+8], 64);partInit.getAffectedRegisters().add(reg_name[rd+8], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.subw\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 res = 0;\n" "res = (*((RISCV64*)cpu)->X["+toString(rd)+" + 8] & 0xffffffff) - (*((RISCV64*)cpu)->X["+toString(rs2)+" + 8] & 0xffffffff);\n" "etiss_int32 cast_0 = res; \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+" + 8] = (etiss_int64)cast_0;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition feq_s_rd_frs1_frs2(ISA32_RISCV64, "feq.s",(uint32_t) 0xa0002053,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//feq.s\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 frs1 = 0;\n" "etiss_uint32 frs2 = 0;\n" "if(64 == 32)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_uint64)fcmp_s(((RISCV64*)cpu)->F["+toString(rs1)+"], ((RISCV64*)cpu)->F["+toString(rs2)+"], (etiss_uint32)0);\n" "}\n" "else\n" "{\n" "frs1 = unbox_s(((RISCV64*)cpu)->F["+toString(rs1)+"]);\n" "frs2 = unbox_s(((RISCV64*)cpu)->F["+toString(rs2)+"]);\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_uint64)fcmp_s(frs1, frs2, (etiss_uint32)0);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)